si2200 Silicon Laboratories, si2200 Datasheet - Page 19

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si2200

Manufacturer Part Number
si2200
Description
Rf Synthesizer With Integrated Vcos Integrated Vcos - Silicon Laboratories
Manufacturer
Silicon Laboratories
Datasheet

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Figure 13 on page 15 shows an application diagram for
the Si2200. The RF output signal must be ac-coupled to
its load through a capacitor.
The IFOUT pin must also be ac-coupled to its load
through a capacitor. The IF output level is dependent
upon the load. Figure 17 displays the output level
versus load resistance. For resistive loads greater than
500 , the output level saturates, and the bias currents
in the IF output amplifier are higher than they need to
be. The LPWR bit in the Main Configuration register
(Register 0) can be set to 1 to reduce the bias currents
and, therefore, reduce the power dissipated by the IF
amplifier. For loads less than 500
set to 0 to maximize the output level.
For IF frequencies greater than 500 MHz, a matching
network is required in order to drive a 50
Figure 15 below. The value of L
determined by Table 9.
Typical values range between 8 nH and 40 nH.
For frequencies less than 500 MHz, the IF output buffer
can directly drive a 200
resistive loads greater than 500
LPWR bit can be set to reduce the power consumed by
the IF output buffer. See Figure 16 below.
Figure 15. IF Frequencies > 500 MHz
Figure 16. IF Frequencies < 500 MHz
500–600 MHz
600–800 MHz
Frequency
800–1 GHz
IFO UT
IFO UT
Table 9. L
L
>500 pF
MATCH
MATCH
resistive load or higher. For
>500 pF
Values
(f < 500 MHz) the
L
40 nH
27 nH
18 nH
LPWR should be
>200
MATCH
MATCH
50
load. See
can be
Rev. 1.0
2.7. Reference Frequency Amplifier
The Si2200 provides a reference frequency amplifier. If
the driving signal has CMOS levels, it can be connected
directly to the XIN pin. Otherwise, the reference
frequency signal should be ac coupled to the XIN pin
through a 560 pF capacitor.
2.8. Powerdown Modes
Table 10 summarizes the powerdown functionality. The
Si2200 can be powered down by taking the PWDN pin
low or by setting bits in the Powerdown register
(Register 2). When the PWDN pin is low, the Si2200 will
be powered down regardless of the Powerdown register
settings. When the PWDN pin is high, power
management is under control of the Powerdown register
bits.
The IF and RF sections of the Si2200 circuitry can be
individually powered down by setting the Powerdown
register bits, PDIB and PDRB, low. The reference
frequency amplifier will also be powered up if either the
PDRB or PDIB bits are high. Also, setting the
AUTOPDB bit to 1 in the Main Configuration register
(Register 0) is equivalent to setting both bits in the
Powerdown register to 1.
The serial interface remains available and can be
written in all power-down modes.
2.9. Auxiliary Output (AUXOUT)
The signal appearing on AUXOUT is selected by setting
the AUXSEL bits in the Main Configuration register
(Register 0).
The LDETB signal can be selected by setting the
AUXSEL bits to 011. This signal can be used to indicate
that the IF or RF PLL is about to lose lock due to
excessive ambient temperature drift and should be re-
tuned.
450
400
350
300
250
200
150
100
50
0
0
Figure 17. Typical IF Output Voltage vs.
LPWR=0
Load Resistance at 550 MHz
200
400
Load Resistance ( )
LPWR=1
600
800
Si2200
1000
1200
19

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