74ALVCH16821DGG,11 NXP Semiconductors, 74ALVCH16821DGG,11 Datasheet - Page 3
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74ALVCH16821DGG,11
Manufacturer Part Number
74ALVCH16821DGG,11
Description
IC 20BIT BUS INTFC D F-F 56TSSOP
Manufacturer
NXP Semiconductors
Series
74ALVCHr
Type
D-Type Busr
Datasheet
1.74ALVCH16821DGG11.pdf
(12 pages)
Specifications of 74ALVCH16821DGG,11
Package / Case
56-TSSOP
Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
10
Frequency - Clock
250MHz
Delay Time - Propagation
2.6ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
ALVC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
2.5 ns at 3.3 V
High Level Output Current
- 24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74ALVCH16821DG-T
74ALVCH16821DG-T
935259010118
74ALVCH16821DG-T
935259010118
Philips Semiconductors
PIN DESCRIPTION
PIN CONFIGURATION
1998 May 29
55, 54, 52, 51, 49,
42, 41, 40, 38, 37,
15, 16, 17, 19, 20,
48, 47, 45, 44, 43
36, 34, 33, 31, 30
21, 23, 24, 26, 27
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
9, 10, 12, 13, 14
PIN NUMBER
32, 39, 46, 53
2, 3, 5, 6, 8,
7, 22, 35, 50
4, 11, 18, 25,
56, 29
1, 28
GND
GND
GND
GND
1OE
2OE
1Q0
1Q1
1Q2
1Q3
V
1Q4
1Q5
1Q6
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
V
2Q6
2Q7
2Q8
2Q9
CC
CC
1Q0 - 1Q9
2Q0 - 2Q9
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1D0 - 1D9
2D0 - 2D9
1OE, 2OE
11
1CP, 2CP
SYMBOL
1
2
3
4
5
6
7
8
9
GND
V
CC
SH00001
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Data inputs
Data in uts
Data outputs
Data out uts
Output enable inputs
(active-Low)
Clock pulse inputs
(active rising edge)
Ground (0V)
Positive supply
voltage
1CP
1D0
1D1
GND
1D2
1D3
V
1D4
1D5
1D6
GND
1D7
1D8
1D9
2D0
2D1
2D2
GND
2D3
2D4
2D5
V
2D6
2D7
GND
2D8
2D9
2CP
CC
CC
FUNCTION
3
FUNCTION TABLE
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High impedance OFF state
} = Not a LOW-to-HIGH clock transition
LOGIC SYMBOL
= LOW to HIGH clock transition
nOE
H
L
L
L
INPUTS
10
12
13
14
15
16
17
19
20
21
23
24
26
27
2
3
5
6
8
9
CP
X
}
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2Q8
2Q9
1OE
2OE
1
28
Dx
H
X
X
L
74ALVCH16821
1CP
2CP
56
29
1D4
1D0
1D2
1D3
1D5
1D6
1D7
1D9
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
2D9
1D1
1D8
SH00127
Product specification
OUTPUT
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
Q0
Q
H
L
Z