74LVC821ABQ,118 NXP Semiconductors, 74LVC821ABQ,118 Datasheet

IC FILP-FLOP D 10BIT 24-DHVQFN

74LVC821ABQ,118

Manufacturer Part Number
74LVC821ABQ,118
Description
IC FILP-FLOP D 10BIT 24-DHVQFN
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Type Busr
Datasheet
1.74LVC821ABQ115.pdf (20 pages)

Specifications of 74LVC821ABQ,118

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
10
Frequency - Clock
150MHz
Delay Time - Propagation
1.5ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC821ABQ-T
74LVC821ABQ-T
935275618118
1. General description
2. Features
The 74LVC821A is a high performance, low power, low voltage Si-gate CMOS device and
superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs can
handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 V
and 5 V environment.
The 74LVC821A is a 10-bit D-type flip-flop featuring separate D-type inputs for each
flip-flop and 3-state outputs for bus-oriented applications. A clock input (pin CP) and an
output enable input (pin OE) are common to all flip-flops. The ten flip-flops will store the
state of their individual D-inputs that meet the set-up and hold times requirements on the
LOW-to-HIGH CP transition. When pin OE is LOW, the contents of the ten flip-flops is
available at the outputs.
When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the
OE inputs does not affect the state of the flip-flops.
74LVC821A
10-bit D-type flip-flop with 5 V tolerant inputs/outputs;
positive-edge trigger; 3-state
Rev. 03 — 11 May 2004
5 V tolerant inputs and outputs; for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Flow-through pin-out architecture
10-bit positive edge-triggered register
Independent register and 3-state buffer operation
Complies with JEDEC standard JESD8-B
ESD protection:
Specified from 40 C to +85 C and 40 C to +125 C.
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Product data sheet

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74LVC821ABQ,118 Summary of contents

Page 1

D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge trigger; 3-state Rev. 03 — 11 May 2004 1. General description The 74LVC821A is a high performance, low power, low voltage Si-gate CMOS device and superior to most advanced CMOS ...

Page 2

Philips Semiconductors 3. Quick reference data Table 1: Quick reference data GND = amb r f Symbol Parameter propagation delay PHL PLH ...

Page 3

Philips Semiconductors 5. Functional diagram Fig 1. Functional diagram. Fig 2. Logic symbol. 9397 750 13276 Product data sheet 10-bit D-type flip-flop with 5 V tolerant inputs/outputs FF0 to 7 ...

Page 4

Philips Semiconductors CP OE Fig 4. Logic diagram. 9397 750 13276 Product data sheet 10-bit D-type flip-flop with 5 V tolerant inputs/outputs FF1 FF2 FF3 ...

Page 5

Philips Semiconductors 6. Pinning information 6.1 Pinning 821A GND 12 001aaa676 Fig 5. Pin configuration SO24 and (T)SSOP24. ...

Page 6

Philips Semiconductors Table 3: Symbol GND Functional description Table 4: Operating mode Load and read register Load register and disable outputs Hold [ HIGH ...

Page 7

Philips Semiconductors Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND T stg P tot [1] The input ...

Page 8

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current LI I 3-state output OFF-state ...

Page 9

Philips Semiconductors [1] All typical values are measured T [2] These typical values are measured at V 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 2 ...

Page 10

Philips Semiconductors Table 8: Dynamic characteristics GND = 2 Symbol Parameter +125 C amb propagation delay CP to ...

Page 11

Philips Semiconductors 12. Waveforms Fig 7. Clock (CP) to output (Qn) propagation delays, the clock pulse width and the Table 9: Supply voltage V CC < 2.7 V 2.7 V Fig 8. Data set-up and hold times for the Dn ...

Page 12

Philips Semiconductors Table 10: Supply voltage V CC < 2.7 V 2.7 V Fig 9. 3-state enable and disable times. Table 11: Supply voltage V CC < 2.7 V 2.7 V Fig 10. Load circuitry for switching times. 9397 750 ...

Page 13

Philips Semiconductors Table 12: Supply voltage Input V CC 1.2 V 2 3.6 V [1] The circuit performs better when R 9397 750 13276 Product data sheet 10-bit D-type flip-flop with 5 V tolerant inputs/outputs Test ...

Page 14

Philips Semiconductors 13. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...

Page 15

Philips Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. ...

Page 16

Philips Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 17

Philips Semiconductors DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm terminal 1 index area terminal 1 index area ...

Page 18

Philips Semiconductors 14. Revision history Table 13: Revision history Document ID Release date 74LVC821A_3 20040511 • Modifications: Figure 74LVC821A_2 20040415 74LVC821A_1 19980925 9397 750 13276 Product data sheet 10-bit D-type flip-flop with 5 V tolerant inputs/outputs Data sheet status Change ...

Page 19

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 20

Philips Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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