sc9821c Silan, sc9821c Datasheet - Page 14

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sc9821c

Manufacturer Part Number
sc9821c
Description
Cd Electronic Shockproof Controller
Manufacturer
Silan
Datasheet
(Continued)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http:
MmuHostCmd[7:0]
www.silan.com.cn
Symbol
Address
0x00
RW
R/W
Initialization
0x08
NORMAL MODE for 200us for DRAM initiate
(auto execute internal 8 cycles of refresh to
initiate dram device)
Bit[3] : Enable Sdram initialize
Bit[7:4] : When use sdram, Bit[7:4] select
when use dram, Bit[7:4] select dram type:
*note: for dram, access timing of 50ns and
60ns dram are supported!, 70ns haven’ t been
test.
5
6— >DRAM SELF-REFRESH MODE, only
7— > DRAM NORMAL MODE, before read
0 > enable Sdram initialize, and do it in the
1 > disable Sdram initialize,
*— > FOR DRAM,THIS BIT IS DON’ T CARE
0000: 1BANK*(4096*256 => 1M*16)
0001: 2BANK*(2048*256 => 512K)
0100: 2BANK*(4096*512 => 2M)
0101: 4BANK*(4096*256 => 1M)
0110: 2BANK*(4096*1024 => 4M)
0111: 4BANK*(4096*512 => 2M)
1000: 4BANK*(4096*1024 => 4M)
1001: 4BANK*(8192*512 => 4M)
0110: 4M * 16bit(4K*1K*16) (4k ref)
0101: 4M * 16bit(8K*512*16) (8k ref)
0100: 1M * 16bit(1k*1k*16) (1k ref)
0011: 1M * 16bit(2k*512*16) (4k ref)
0010: 1M * 16bit(4k*256*16) (4k ref)
0001: 256k*16(512*512*16)
Sdram auto refresh. When SDRAM not
used in a period, but there should
remain the data, it can adopt this mode,
then reduce the power dissipation.
for “ s” version dram. When enter this
mode for more than 100us, DRAM will
be in SELF-REFRESH state. you can
change mode only by set MmuHostCmd
BIT[2:0] to 7(that’ s change to normal
mode of dram)
or write operation of DRAM, you should
enter
>disable Sdram refresh, but enable
control of Bit[2:0]
Sdram
Description
REV:1.0
(To be continued)
SC9821C
Page 14 of 18
2006.07.21

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