sc9821c Silan, sc9821c Datasheet - Page 13

• Manufacturer Part Number: sc9821c
• Description: Cd Electronic Shockproof Controller
• Manufacturer: Silan

(Continued)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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Esp configuration register
BitStreamType[7:0]
BitPoolPageLimitHigh
[7:0]
BitPoolPageLimitLow
[7:0]
ShockMsk[7:0]
Register in the Mmu module
MmuHostCmd[7:0]
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Symbol
Address
0x76
0x58
0x59
0x5B
0x00
W
W
W
W
RW
R/W
Initialization
0x00
0x07
0xff
0x00
0x08
bit[3:2] is CD-DA input interface, and bit[1:0] is
DAC output interface.
bit3:
bit2:
bit1:
bit0:
BitPoolPageLimitHigh
BitPoolPageLimitLow form the up limit of
DRAM addressed by BitPool, and determined
the DRAM space as ESP buffer;
Note: the external DRAM space of BitPool
address which can be accessed by BitPool is
Page[0, BitPoolLimitHigh &
BitPoolPageLimitLow]. In the current MCU,
each page is 256×16bit
Shock signal shield register. It’ s unit is
128*59ns=7.552us, if the signal length is less
than input time, it is not consider the shock.
The max. shock shield time is 255x7.552us =
1,925.880 us.
Bit[2:0]: Control the Sdram operation:
1: the input is IIS interface
0: the input is EIAJ interface
0: the input word clock has 16 bitclk
1: the input word clock has 24 bitclk
1: the output is IIS interface
0: the output is EIAJ interface
0: the output word clock has 16 bitclk
1: the output word clock has 24 bitclk
0 >no operation
1 >control Sdram carry out Precharge
2 >control Sdram carry out CBR
3 > control Sdram set modes
4 >enable Sdram refresh
Description
REV:1.0
(To be continued)
SC9821C
Page 13 of 18
2006.07.21
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