si3068 Silicon Laboratories, si3068 Datasheet - Page 33

• Manufacturer Part Number: si3068
• Description: Fcc+ Embedded Direct Access Arrangement
• Manufacturer: Silicon Laboratories

DAA Register 24. Ring Validation Control 3
Reset settings = 0x01_1001
DAA Register 25-28. Reserved
Reset settings = xxxx_xxxx
Bit
5:0
Bit
7:0
7
6
Name
Name
Type
Type
Bit
Bit
Reserved
Reserved
RAS[5:0]
RNGV
Name
Name
RNGV
R/W
D7
D7
Ring Validation Enable.
0 = Ring validation feature is disabled.
1 = Ring validation feature is enabled in normal operating mode and low-power mode.
Always write this bit to zero. Reads undefined.
Ring Assertion Time.
These bits set the minimum ring frequency for a valid ring signal. During ring qualification,
a timer is loaded with the RAS[5:0] field upon a TIP/RING event and decrements at a reg-
ular rate. If a second or subsequent TIP/RING event occurs after the timer has timed out,
the frequency of the ring is too low and the ring is invalidated. The difference between
RAS[5:0] and RMX[5:0] identifies the minimum duration between TIP/RING events to
qualify as a ring, in binary-coded increments of 2.0 ms (nominal). A TIP/RING event typi-
cally occurs twice per ring tone period. At 20 Hz, TIP/RING events would occur every
1/(2 x 20 Hz) = 25 ms. To calculate the correct RAS[5:0] value for a frequency range
[f_min, f_max], the following equation should be used:
Always write this bit to zero. Reads undefined.
D6
D6
D5
D5
RAS 5:0
Rev. 1.0
[
D4
D4
]
≥
------------------------------------------ - , RMX RAS
2 f_min
×
Function
Function
1
D3
D3
×
2 ms
RAS[5:0]
R/W
D2
D2
≤
D1
D1
Si3068
D0
D0
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