74HCT112N,652 NXP Semiconductors, 74HCT112N,652 Datasheet - Page 9

• Manufacturer Part Number: 74HCT112N,652
• Description: IC DUAL JK NEG-EDG-TRG FF 16-DIP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr
• Type: JK Typer

Specifications of 74HCT112N,652

• Function: Set(Preset) and Reset
• Output Type: Differential
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 64MHz
• Trigger Type: Negative Edge
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Logic Family: HCT
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Negative-Edge
• Polarity: Invert/Non-Invert
• Operating Supply Voltage (typ): 5V
• Package Type: DIP
• Propagation Delay Time: 60ns
• Low Level Output Current: 6mA
• High Level Output Current: -6mA
• Frequency (max): 20MHz
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Through Hole
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 74HCT112N; 74HCT112N; 933669900652

Philips Semiconductors
AC WAVEFORMS
1998 Jun 10
Dual JK flip-flop with set and reset;
negative-edge trigger
(1) HC : V
The shaded areas indicate when the input is permitted to
change for predictable output performance.
Fig.6
(1) HC : V
Fig.7
HCT: V
HCT: V
Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width,
clock pulse frequency.
Waveforms showing the set (nS
and reset pulse width and the nR
the nJ, nK to nCP set-up times, the nCP to nJ, nK hold times, the output transition times and the maximum
M
M
M
handbook, full pagewidth
M
= 50%; V
= 50%; V
= 1.3 V; V
= 1.3 V; V
I
I
I
I
= GND to V
= GND to V
= GND to 3 V.
= GND to 3 V.
nQ OUTPUT
nQ OUTPUT
nR D INPUT
nCP INPUT
nS D INPUT
CC
CC
.
.
t PHL
V M
D
) and reset (nR
D
(1)
t W
V M
and nS
t PLH
V M
(1)
(1)
D
to nCP removal time.
9
D
) input to output (nQ, nQ) propagation delays, the set
t rem
t PLH
V M
t PHL
(1)
t W
t rem
V M
MBK218
(1)
74HC/HCT112
Product specification