74AUP2G80GD,125 NXP Semiconductors, 74AUP2G80GD,125 Datasheet - Page 11

• Manufacturer Part Number: 74AUP2G80GD,125
• Description: IC FLIP-FLOP D POS-EDGE 8-XSON
• Manufacturer: NXP Semiconductors
• Series: 74AUPr
• Type: D-Typer

Specifications of 74AUP2G80GD,125

• Output Type: Inverted
• Package / Case: 8-XSON
• Function: Standard
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 550MHz
• Delay Time - Propagation: 2.2ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: AUP
• Logic Type: CMOS
• Polarity: Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 20.7 ns
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 0.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AUP2G80GD-G; 74AUP2G80GD-G; 935286844125

NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V; for test circuit see
[1]
[2]
[3]
74AUP2G80
Product data sheet
Symbol Parameter
t
t
t
C
su(L)
h
W
PD
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
set-up time
LOW
hold time
pulse width
power
dissipation
capacitance
PD
Dynamic characteristics
CC
× V
2
× f
CC
o
2
) = sum of the outputs.
× f
PLH
i
× N + Σ(C
Conditions
nD to nCP; see
nD to nCP; see
nCP HIGH or LOW;
see
f = 1 MHz; V
and t
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
Figure 9
PHL
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
L
× V
CC
I
= GND to V
2
…continued
× f
Figure 9
Figure 9
o
All information provided in this document is subject to legal disclaimers.
) where:
CC
.
CC
Rev. 5 — 5 October 2010
[3]
D
in μW).
Min
Low-power dual D-type flip-flop; positive-edge trigger
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
T
amb
Figure
Typ
−2.1
−0.4
−0.3
−0.2
−0.2
−0.3
1.7
0.3
0.2
0.2
0.3
0.3
5.2
1.0
0.8
0.6
0.5
0.5
1.8
1.8
1.9
2.0
2.4
2.9
= 25 °C
[1]
10.
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(85 °C)
Min
1.9
1.3
1.1
0.8
0.7
0.1
3.0
2.0
2.0
2.0
2.0
0
0
0
0
-
-
-
-
-
-
-
-
-
T
amb
(85 °C)
Max
= −40 °C to +125 °C
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
74AUP2G80
(125 °C)
Min
1.9
1.3
1.1
0.8
0.7
0.1
3.0
2.0
2.0
2.0
2.0
0
0
0
0
-
-
-
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
(125 °C)
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
11 of 24
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
pF
pF
pF
pF