74AUP2G80GM,125 NXP Semiconductors, 74AUP2G80GM,125 Datasheet - Page 21

• Manufacturer Part Number: 74AUP2G80GM,125
• Description: IC DUAL D-TYPE F-F 8-XQFN
• Manufacturer: NXP Semiconductors
• Series: 74AUPr
• Type: D-Typer

Specifications of 74AUP2G80GM,125

• Output Type: Inverted
• Package / Case: 8-XQFN
• Function: Standard
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 550MHz
• Delay Time - Propagation: 2.2ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: AUP
• Logic Type: CMOS
• Polarity: Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 20.7 ns
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 0.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AUP2G80GM-G; 74AUP2G80GM-G; 935281429125

NXP Semiconductors
14. Abbreviations
Table 11.
15. Revision history
Table 12.
74AUP2G80
Product data sheet
Acronym
CDM
DUT
ESD
HBM
MM
Document ID
74AUP2G80 v.5
Modifications:
74AUP2G80 v.4
74AUP2G80 v.3
74AUP2G80 v.2
74AUP2G80 v.1
Abbreviations
Revision history
Description
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Release date
20101005
20080602
20080328
20070801
20060825
•
•
•
Added type number 74AUP2G80GF (SOT1089/XSON8 package).
Added type number 74AUP2G80GN (SOT1116/XSON8 package).
Added type number 74AUP2G80GS (SOT1203/XSON8 package).
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Rev. 5 — 5 October 2010
Low-power dual D-type flip-flop; positive-edge trigger
Change notice
-
-
-
-
-
74AUP2G80
74AUP2G80 v.4
74AUP2G80 v.3
74AUP2G80 v.2
74AUP2G80 v.1
-
Supersedes
© NXP B.V. 2010. All rights reserved.
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