74LVC1G175GM,132 NXP Semiconductors, 74LVC1G175GM,132 Datasheet - Page 9
![IC SNGL D FF POS-EDG TRIG 6XSON](/photos/1/39/13915/6-xson_sot886_pkg_sml.jpg)
74LVC1G175GM,132
Manufacturer Part Number
74LVC1G175GM,132
Description
IC SNGL D FF POS-EDG TRIG 6XSON
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Typer
Datasheet
1.74LVC1G175GW125.pdf
(20 pages)
Specifications of 74LVC1G175GM,132
Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
1
Frequency - Clock
200MHz
Delay Time - Propagation
2.2ns
Trigger Type
Positive Edge
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
6-XSON (Micropak™), SOT-886
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC1G175GM-H
74LVC1G175GM-H
935277208132
74LVC1G175GM-H
935277208132
NXP Semiconductors
12. Waveforms
74LVC1G175
Product data sheet
Fig 7.
Fig 8.
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
The clock input (CP) to output (Q) propagation delays, the clock pulse width, the D to CP set-up, the CP to
D hold times, and the maximum clock pulse frequency
Measurement points are given in
V
CP recovery time
The master reset (MR) input to output (Q) propagation delays, the master reset pulse width, and the MR to
OL
OL
and V
and V
OH
OH
are typical output voltage drops that occur with the output load.
are typical output voltage drops that occur with the output load.
MR input
CP input
Q output
CP input
Q output
D input
GND
GND
GND
GND
V
V
V
V
OH
OH
OL
OL
V
V
V
V
I
I
Table
I
I
Table
All information provided in this document is subject to legal disclaimers.
9.
9.
V
M
Rev. 4 — 4 October 2010
t
su
t
V
V
h
M
Single D-type flip-flop with reset; positive-edge trigger
M
t
V
PHL
t
W
M
t
PHL
t
W
1/f
max
V
M
t
su
t
rec
t
V
h
M
001aaa464
001aaa465
t
PLH
74LVC1G175
© NXP B.V. 2010. All rights reserved.
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