smp100lc STMicroelectronics, smp100lc Datasheet - Page 9
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smp100lc
Manufacturer Part Number
smp100lc
Description
Trisiltm For Telecom Equipment Protection
Manufacturer
STMicroelectronics
Datasheet
1.SMP100LC.pdf
(12 pages)
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SMP100LC
3
Figure 17. Test circuit 3 for dynamic I
Ordering information scheme
Trisil Surface Mount
Repetitive Peak Pulse Current
100 = 100A
Capacitance
LC = Low Capacitance
Voltage
65 = 65V
This is a GO-NOGO test which allows to confirm the holding current (I ) level in a
functional test circuit.
TEST PROCEDURE
1/ Adjust the current level at the I value by short circuiting the AK of the D.U.T.
2/ Fire the D.U.T. with a surge current
3/ The D.U.T. will come back off-state within 50ms maximum.
V
BAT
= - 48 V
R
H
➔ I
PP
= 10A, 10/1000µs.
H
parameter
D.U.T
SMP
Ordering information scheme
100
Surge generator
H
LC - xxx
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