74AHC574D,118 NXP Semiconductors, 74AHC574D,118 Datasheet - Page 12

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74AHC574D,118

Manufacturer Part Number
74AHC574D,118
Description
IC OCT D F-F POS-EDG TRIG 20SOIC
Manufacturer
NXP Semiconductors
Series
74AHCr
Type
D-Type Busr
Datasheet

Specifications of 74AHC574D,118

Package / Case
20-SOIC (7.5mm Width)
Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
75MHz
Delay Time - Propagation
9ns
Trigger Type
Positive Edge
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
AHC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
4.4 ns at 5 V
High Level Output Current
- 8 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Dc
0728
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC574D-T
74AHC574D-T
935263080118
NXP Semiconductors
Table 9.
74AHC_AHCT574_2
Product data sheet
Type
74AHC574
74AHCT574
Fig 10. Load circuitry for switching times
Test data is given in
Definitions test circuit:
R
C
R
S1 = Test selection switch.
T
L
L
Test data
= Termination resistance should be equal to output impedance Z
= Load capacitance including jig and probe capacitance.
= Load resistance.
Input
V
V
3.0 V
I
CC
Table
GENERATOR
t
3.0 ns
3.0 ns
PULSE
9.
r
negative
, t
positive
f
pulse
pulse
0 V
0 V
V
V
I
I
90 %
10 %
Load
C
15 pF, 50 pF
15 pF, 50 pF
V I
L
Rev. 02 — 24 January 2008
t
t
r
f
V
V
M
M
R T
10 %
90 %
DUT
V
CC
Octal D-type flip-flop; positive edge-trigger; 3-state
t
t
R
1 k
1 k
W
W
L
74AHC574; 74AHCT574
V O
o
of the pulse generator.
V
V
M
M
C L
S1 position
t
open
open
PHL
t
t
r
f
R L
, t
PLH
S1
001aad983
V
CC
open
t
GND
GND
PZH
, t
PHZ
© NXP B.V. 2008. All rights reserved.
t
V
V
PZL
CC
CC
, t
PLZ
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