cef830g Hope Microelectronics co., Ltd, cef830g Datasheet - Page 63

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cef830g

Manufacturer Part Number
cef830g
Description
Rf42/43 Ism Transmitter
Manufacturer
Hope Microelectronics co., Ltd
Datasheet
Register 07h. Operating Mode and Function Control 1
Reset value = 00000001
Name
Type
Bit
Bit
7
6
5
4
3
2
1
0
Tel: +86-755-82973805
R/
swres
w
D7
Reserved
x32ksel
Name
swres
enlbd
enwt
pllon
txon
xton
R/
w
enlbd
D6
Software Register Reset Bit.
This bit may be used to reset all registers simultaneously to a DEFAULT state,
without the need for sequentially writing to each individual register. The RESET is
accomplished by setting swres = 1. This bit will be automatically cleared.
Enable Low Battery Detect.
When this bit is set to 1 the Low Battery Detector circuit and threshold
comparison will be enabled.
Enable Wake-Up-Timer.
Enabled when enwt = 1. If the Wake-up-Timer function is enabled it will operate in
any mode and notify the microcontroller through the GPIO interrupt when the timer
expires.
32,768 kHz Crystal Oscillator Select.
0: RC oscillator
1: 32 kHz crystal
TX on in Manual Transmit Mode.
Automatically cleared in FIFO mode once the packet is sent. Transmission can be
aborted during packet transmission, however, when no data has been sent yet,
transmission can only be aborted after the device is programmed to ―unmodulated
carrier‖ ("Register 71h. Modulation Mode Control 2").
Reserved.
TUNE Mode (PLL is ON).
When pllon = 1 the PLL will remain enabled in Idle State. This will for faster
turn-around time at the cost of increased current consumption in Idle State.
READY Mode (Xtal is ON).
Fax: +86-755-82973550
R/
w
enwt
D5
R/
x32ksel
w
D4
E-mail: sales@hoperf.com
R/
txon
Function
D3
w
Reserved
D2
R/
w
R F 4 2 / 4 3
http://www.hoperf.com
R/
pllon
w
D1
R/
xton
D0
w
63

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