cef830g Hope Microelectronics co., Ltd, cef830g Datasheet - Page 19
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cef830g
Manufacturer Part Number
cef830g
Description
Rf42/43 Ism Transmitter
Manufacturer
Hope Microelectronics co., Ltd
Datasheet
1.CEF830G.pdf
(113 pages)
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3.5. System Timing
The system timing for TX mode is shown in Figure 6. The timing is shown transitioning from STANDBY mode to TX
mode and going automatically through the built-in sequencer of required steps. If a small range of frequencies is being
used and the temperature range is fairly constant a calibration may only be needed at the initial power up of the device.
The relevant system timing registers are shown below.
The VCO will automatically calibrate at every frequency change or power up. The VCO CAL may also be forced by
setting the vcocal bit. The 32.768 kHz RC oscillator is also automatically calibrated but the calibration may also be
forced. The enrcfcal will enable the RC Fine Calibration which will occur every 30 seconds. The rccal bit will force a
complete calibration of the RC oscillator which will take approximately 2 ms. The PLL T0 time is to allow for bias
settling of the VCO, the default for this should be adequate. The PLL TS time is for the settling time of the PLL, which
has a default setting of 200 μs. This setting should be adequate for most applications but may be reduced if small
frequency jumps are used. For more information on the PLL register configuration options, see ―Register 53h. PLL
Tune Time,‖ and ―Register 55h. Calibration
53
54
55
R/W
R/W
R/W
R/W
Tel: +86-755-82973805
PLL Tune Time
Function/De
Reserved 1
Calibration
scription
Control
D7
Fax: +86-755-82973550
X
xtalstart
Control,‖.
half
D6
X
Figure 6. TX Timing
pllts[4:0]
adccaldo
D5
ne
X
E-mail: sales@hoperf.com
enrcfcal
D4
X
rccal
D3
X
Vcoca
D2
ldp
X
R F 4 2 / 4 3
http://www.hoperf.com
vcocal
pllt0[2:0]
D1
X
skipvco
D0
X
POR
19
Def.
45h
00h
04h
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