74AHCT574PW,118 NXP Semiconductors, 74AHCT574PW,118 Datasheet - Page 5

• Manufacturer Part Number: 74AHCT574PW,118
• Description: IC OCT D FF POS-EDG TRIG 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr
• Type: D-Type Busr

Specifications of 74AHCT574PW,118

• Package / Case: 20-TSSOP
• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 115MHz
• Delay Time - Propagation: 6.3ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: AHCT
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 4.4 ns
• High Level Output Current: - 8 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 4.5 V
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 5V
• Package Type: TSSOP
• Low Level Output Current: 8mA
• Frequency (max): 110MHz
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AHCT574PW-T; 74AHCT574PW-T; 935263083118

NXP Semiconductors
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
[4]
74AHC_AHCT574_2
Product data sheet
Operating mode
Load and read register
Load register and disable output
Symbol
V
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
I
tot
H = HIGH voltage level;
h = HIGH voltage level one setup time prior to the HIGH-to-LOW CP transition;
L = LOW voltage level;
l = LOW voltage level one setup time prior to the HIGH-to-LOW CP transition;
Z = high-impedance OFF-state;
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
P
P
P
tot
tot
tot
= LOW-to-HIGH clock transition.
derates linearly with 8 mW/K above 70 C.
derates linearly with 5.5 mW/K above 60 C.
derates linearly with 4.5 mW/K above 60 C.
Function table
Limiting values
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
SO20 package
TSSOP20 package
DHVQFN20 package
[1]
Input
OE
L
L
H
H
Conditions
V
V
V
T
Rev. 02 — 24 January 2008
amb
I
O
O
< 0.5 V
< 0.5 V or V
= 0.5 V to (V
= 40 C to +125 C
CP
Octal D-type flip-flop; positive edge-trigger; 3-state
O
CC
> V
74AHC574; 74AHCT574
+ 0.5 V)
CC
+ 0.5 V
Dn
l
h
l
h
Internal
flip-flop
L
H
L
H
[1]
[1]
[2]
[3]
[4]
Min
-
-
-
-
-
-
0.5
0.5
20
75
65
© NXP B.V. 2008. All rights reserved.
Max
+7.0
+7.0
-
75
-
+150
500
500
500
20
25
Output
Qn
L
H
Z
Z
Unit
V
V
mA
mA
mA
mA
mA
mW
mW
mW
C
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