74AHC374PW,118 NXP Semiconductors, 74AHC374PW,118 Datasheet - Page 10

• Manufacturer Part Number: 74AHC374PW,118
• Description: IC OCT D FF POS-EDG TRIG 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCr
• Type: D-Type Busr

Specifications of 74AHC374PW,118

• Package / Case: 20-TSSOP
• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 85MHz
• Delay Time - Propagation: 8.4ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: AHC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 4.4 ns at 5 V
• High Level Output Current: - 8 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 2 V
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 5V
• Package Type: TSSOP
• Low Level Output Current: 8mA
• Frequency (max): 110MHz
• Operating Supply Voltage (min): 2V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AHC374PW-T; 74AHC374PW-T; 935262681118

NXP Semiconductors
74AHC_AHCT374_3
Product data sheet
Fig 6.
Fig 7.
Measurement points are given in
V
Clock pulse width, maximum frequency and input to output propagation delays
Measurement points are given in
V
Enable and disable times
OL
OL
and V
and V
10.1 Waveforms
OH
OH
are typical voltage output levels that occur with the output load.
are typical voltage output levels that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
OFF-to-LOW
Qn output
Qn output
OE input
Qn output
CP input
GND
GND
V
V
Table
Table
V
OH
CC
GND
OL
V
V
V
OH
I
OL
V
I
8.
8.
V
enabled
Rev. 03 — 12 June 2008
outputs
M
V
t
t
PLZ
t
PHL
M
PHZ
t
W
V
M
1/f
V
X
max
V
Octal D-type flip-flop; positive edge-trigger; 3-state
Y
74AHC374; 74AHCT374
disabled
outputs
t
PLH
t
PZL
t
PZH
001aac426
V
M
V
M
outputs
enabled
mna813
© NXP B.V. 2008. All rights reserved.
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