upd44645182af5-fq1-a Renesas Electronics Corporation., upd44645182af5-fq1-a Datasheet - Page 11

• Manufacturer Part Number: upd44645182af5-fq1-a
• Description: 72m-bit Qdrtm Ii Sram 2-word Burst Operation
• Manufacturer: Renesas Electronics Corporation.

Truth Table
Remarks 1. H : HIGH, L : LOW, × : don’t care, ↑ : rising edge.
WRITE cycle
Load address, input write data on
consecutive K and K# rising edge
READ cycle
Load address, output data on
consecutive C and C# rising edge
NOP (No operation)
Clock stop
2. Data inputs are registered at K and K# rising edges. Data outputs are delivered at C and C# rising edges
3. All control inputs in the truth table must meet setup/hold times around the rising edge (LOW to HIGH) of
4. This device contains circuitry that ensure the outputs to be in high impedance during power-up.
5. Refer to state diagram and timing diagrams for clarification.
6. It is recommended that K = K# = C = C# when clock is stopped. This is not essential but permits most
Operation
except if C and C# are HIGH then Data outputs are delivered at K and K# rising edges.
K. All control inputs are registered during the rising edge of K.
rapid restart by overcoming transmission line charging symmetrically.
Stopped
L → H
L → H
L → H
CLK
Preliminary Data Sheet M19958EJ1V0DS
R#
×
H
×
L
μ
PD44645092A-A, 44645182A-A, 44645362A-A
W#
×
H
×
L
D =
Previous state
×
Data out
Data in
, Q = High-Z
D or Q
Output clock
Output data
Input clock
Input data
C#(t+1) ↑
D
Q
K( t ) ↑
A
A
(A+0)
(A+0)
D
Q
K#( t ) ↑
C(t+2) ↑
A
A
(A+1)
(A+1)
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