ds2761 Maxim Integrated Products, Inc., ds2761 Datasheet - Page 6

• Manufacturer Part Number: ds2761
• Description: Ds2761 High-precision Li+ Battery Monitor
• Manufacturer: Maxim Integrated Products, Inc.

POWER MODES
The DS2761 has two power modes: active and sleep. While in active mode, the DS2761 continually
measures current, voltage, and temperature to provide data to the host system and to support current
accumulation and Li+ safety monitoring. In sleep mode, the DS2761 ceases these activities. The DS2761
enters sleep mode when any of the following conditions occurs:
§ The PMOD bit in the Status Register has been set to 1 and the DQ line is low for longer than
§ The voltage on V
§ The pack is disabled through the issuance of a SWAP command (SWEN bit = 1)
The DS2761 returns to active mode when any of the following occurs:
§ The PMOD bit has been set to 1 and the SWEN bit is set to 0 and the DQ line is pulled high
§ The
§ The voltage on PLS becomes greater than the voltage on V
§ The pack is enabled through the issuance of a SWAP command (SWEN bit = 1)
The DS2761 defaults to sleep mode when power is first applied.
Li+ PROTECTION CIRCUITRY
During active mode, the DS2761 constantly monitors cell voltage and current to protect the battery from
overcharge (overvoltage), overdischarge (undervoltage), and excessive charge and discharge currents
(overcurrent, short circuit). Conditions and DS2761 responses are described in the sections below and
summarized in Table 2 and Figure 3.
Table 2. Li+ PROTECTION CONDITIONS AND DS2761 RESPONSES
V
delivered from pin SNS.
1) If V
2) For the internal sense resistor configuration, the overcurrent thresholds are expressed in terms of current: I
3) With test current I
4) With test current I
Overvoltage. If the cell voltage on V
overvoltage delay, t
protection register. When the cell voltage falls below charge enable threshold V
Overcurrent, Discharge
Short Circuit
Overvoltage
Undervoltage
Overcurrent, Charge
IS
= V
2s (pack disconnection)
(pack connection)
set to 0
allows V
charge direction and I
IS1
CONDITION
DD
PS
- V
< 2.2V, release is delayed until the recovery charge current (I
NAME
DD
IS2
pin is pulled low (power switch)
. Logic high = V
to exceed 2.2V.
TST
TST
OVD
IN
SNS
flowing from PLS to V
flowing from V
drops below undervoltage threshold V
, the DS2761 shuts off the external charge FET and sets the OV flag in the
< -I
PLS
OC
THRESHOLD
for
V
for discharge direction
V
V
V
V
IS
CC
IS
SNS
IN
IN
< -V
> V
DD
> V
< V
> V
and V
to PLS (pullup on PLS)
IN
OC
OC
OV
UV
exceeds the overvoltage threshold, V
SC
(2)
SS
(2)
DD
(pulldown on PLS)
for
ACTIVATION
DC
DELAY
6 of 24
t
t
t
t
t
OVD
UVD
OCD
OCD
SCD
.
All voltages are with respect to V
RC
UV
CC
RESPONSE
CC
) passed from PLS to V
Sleep Mode
IN
for t
CC
DC
DC
,
(charger connection) with the SWEN bit
,
DC
DC
high
high
high
UVD
high,
high
(cell depletion)
OV
SS
, for a period longer than
CE
. I
DD
(charger connected)
V
V
V
, the DS2761 turns the
SNS
PLS
PLS
charges the battery and
THRESHOLD
PLS
V
V
references current
RELEASE
V
PLS
IN
< V
> V
> V
IS
< V
≤ -2mV
> V
DD
DD
DD
SNS
CE
DD
- V
- V
- V
> I
, or
(1)
TP
OC
TP
TP
(3)
(4)
(4)
for