ds26518 Maxim Integrated Products, Inc., ds26518 Datasheet - Page 172
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ds26518
Manufacturer Part Number
ds26518
Description
8-port T1/e1/j1 Transceiver
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS26518.pdf
(286 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Note: Status bits in this register are latched.
When a channel’s signaling data changes state, the respective bit in registers RSS1–4 will be set and latched. The
RSCOS bit (RLS4.3) will be set if the channel was also enabled by setting the appropriate bit in RSCSE1–4. The
INTB signal will go low if enabled by the interrupt mask bit RIM4.3. The bit will remain set until read.
*
represents reserved bits and the distant multiframe alarm.
Note that in E1 CAS mode, the LSB of RSS1 would typically represent the CAS alignment bits, and the LSB of
(MSB)
CH16
CH24
CH32
CH8
7
CH15
CH23
CH31
CH7
RSS1, RSS2, RSS3, RSS4
Receive-Signaling Status Registers 1 to 4
098h, 099h, 09Ah, 09Bh + (200h x (n - 1)) : where n = 1 to 8
6
CH14
CH22
CH30
CH6
5
CH13
CH21
CH29
CH5
4
172 of 286
CH12
CH20
CH28
CH4
3
CH11
CH19
CH27
CH3
2
DS26518 8-Port T1/E1/J1 Transceiver
CH10
CH18
CH26
CH2
1
CH17*
(LSB)
CH25
CH1*
CH9
0
RSS1
RSS2
RSS3
RSS4 (E1
Mode Only)
RSS3