cy28359 Cypress Semiconductor Corporation., cy28359 Datasheet

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cy28359

Manufacturer Part Number
cy28359
Description
273-mhz 6-output Buffer For Ddr400 Dimms
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-07636 Rev. **
Features
• Dual 1- to 3-output buffer/driver
• Supports up to 2 DDR DIMMs
• Outputs are individually enabled/disabled
• Low-skew outputs (< 100 ps)
• Supports 266-MHz, 333-MHz and 400-MHz DDR SDRAM
• SMBus Read and Write support
• Space-saving 28-pin SSOP package
Block Diagram
SEL_ADDR
BUF_INA
BUFF_INB
SDATA
SCLK
Decoding
SMBus
273-MHz 6-Output Buffer for DDR400 DIMMS
3901 North First Street
PRELIMINARY
FB_OUTA
DDRAT0
DDRAC0
DDRAT1
DDRAC1
DDRAT2
DDRAC2
DDRBT0
DDRBC0
DDRBT1
DDRBC1
DDRBT2
DDRBC2
FB_OUTB
Functional Description
The CY28359 is a 2.5V buffer designed to distribute
high-speed clocks in PC applications. The part has 6 differ-
ential outputs. Designers can configure these outputs to
support up to two DDR DIMMs. The CY28359 can be used in
conjunction with the CY28326 or similar clock synthesizer for
the VIA P4X600 chipset.
The CY28359 also includes an SMBus interface which can
enable or disable each output clock. On power-up, all output
clocks are enabled.
FB_OUTB
FB_OUTA
BUF_INB
BUF_INA
DDRBC0
DDRBC1
DDRAC0
DDRBT0
DDRBT1
DDRAT0
DDRAT1
VDD
VSS
VSS
San Jose
1
2
3
4
5
6
7
8
9
10
11
12
13
14
,
Pin Configuration
28 PIN SSOP
CA 95134
Revised February 16, 2004
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SEL_ADDR
VDD
VSS
DDRBT2
DDRBC2
VSS
VDD
DDRAT2
DDRAC2
SDATA
SCLK
VSS
VDD
DDRAC1
408-943-2600
CY28359

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cy28359 Summary of contents

Page 1

... The CY28359 is a 2.5V buffer designed to distribute high-speed clocks in PC applications. The part has 6 differ- ential outputs. Designers can configure these outputs to support up to two DDR DIMMs. The CY28359 can be used in conjunction with the CY28326 or similar clock synthesizer for the VIA P4X600 chipset. ...

Page 2

... The offset of the indexed byte is encoded in the command code, as described in Table 1. The Block Write and Block Read protocol is outlined in Table 2 while Table 3 outlines the corresponding Byte Write and Byte Read protocol.The slave receiver address is 11010010 (D2h) or 11011100 (DCh) depending on state of ADDRSEL Description CY28359 Description Page ...

Page 3

... Acknowledge from slave 20 Repeat start 21:27 Slave address – 7 bits 28 Read = 1 29 Acknowledge from slave 30:37 Data byte from slave – 8 bits 38 Acknowledge from master 40 Stop CY28359 Description Description Page ...

Page 4

... Bit 5 21,20 Bit 4 -- Bit 3 14,15 Bit 2 12,13 Bit 1 -- Bit 0 -- Document #: 38-07636 Rev. ** PRELIMINARY SMBus Address for the CY28359 when SEL_ADDR= SMBus Address for the CY28359 when SEL_ADDR= Description Input Threshold Control00: Normal (1.25V) 01: 1.20V 10: 1.15V 11: 1.35V FBOUTA 0 = Enable Disable FBOUTB 0 = Enable Disable ...

Page 5

... Unloaded outputs, 273 MHz Loaded outputs, 273 MHz See Test Circuitry (Refer to Figure 1) . Test Conditions Measured for 2.5V outputs. IN DD/ [2] Measured between 20% to 80% of output (Refer to Figure 1) [2] All outputs equally loaded CY28359 Min. Typ. Max. 2.375 – 2.625 –40 – 85 – 6 – – ...

Page 6

... CC ) 60: ) 60: Package Type 28-pin SSOP 28-pin SSOP (Tape & Reel) 28-pin SSOP 28-pin SSOP (Tape & Reel) CY28359 VTR R =120: T Receiver VCP Operating Range Commercial, 0° °C Commercial, 0° °C Industrial, –40° °C Industrial, –40° °C ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY CY28359 51-85079-*C Page ...

Page 8

... Document History Page Document Title: CY28359 273-MHz 6-Output Buffer for DDR400 DIMMS Document Number: 38-07636 Rev. ECN No. Issue Date ** 204380 See ECN Document #: 38-07636 Rev. ** PRELIMINARY Orig. of Change RGL New Data Sheet CY28359 Description of Change Page ...

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