cy28rs680 SpectraLinear Inc, cy28rs680 Datasheet - Page 2
![no-image](/images/no-image-200.jpg)
cy28rs680
Manufacturer Part Number
cy28rs680
Description
Clock Generator For Ati Rs5xx/6xx Chipsets
Manufacturer
SpectraLinear Inc
Datasheet
1.CY28RS680.pdf
(20 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cy28rs680ZXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Rev 1.0, March 28, 2007
Pin Descriptions
34, 35, 36, 37
16, 17, 18,
19, 20, 21
24, 25, 26,
Pin No.
12, 13
32, 33
40, 41
42, 43
30,31
46,47
6, 7
10
11
14
15
22
23
27
28
29
38
39
45
48
49
50
44
1
2
3
4
5
8
9
CLKREQ#[B:C]
USB_48 [1:0]
SRCT/C[6:4]
SRCT/C[3:2]
ATIGT/C[2:1]
RESET_IN#
SRCT/C[7]
VSS_ATIG
VDD_ATIG
VDD_SRC
VDD_SRC
VDD_SRC
VDD_SRC
VSS_REF
VDD_REF
VSS_SRC
VSS_SRC
VSS_SRC
VSS_SRC
VSS_SRC
ATIGT/C3
ATIGT/C0
SRCT/C1
SRCT/C0
VDD_48
VSS_48
SDATA
XOUT
VDDA
SCLK
VSSA
Name
XIN
I/O,PU SMBus-compatible SDATA.This pin has an internal pull up, but is tri-stated in
O, DIF 100 MHz differential serial reference clock. Intel Type-SR buffer.
O, DIF 100 MHz differential serial reference clock. Intel Type-SR buffer.
O, DIF 100 MHz differential serial reference clock. Intel Type-SR buffer.
O, DIF Differential Selectable serial reference clock. Intel Type-SR buffer.
O, DIF Differential Selectable serial reference clock. Intel Type-SR buffer.
O, DIF Differential Selectable serial reference clock. Intel Type-SR buffer.
O, DIF 100 MHz differential serial reference clock. Intel Type-SR buffer.
O, DIF 100 MHz differential serial reference clock. Intel Type-SR buffer.
O, SE 48 MHz clock output. Intel
I, SE,
PWR GND for REF, XTAL
PWR 3.3V power supply for REF, XTAL
PWR 3.3V power supply for USB outputs
GND
PWR 3.3V power supply for SRC outputs
GND
GND
PWR 3.3V power supply for SRC outputs
PWR 3.3V power supply for SRC outputs
GND
PWR 3.3V power supply for ATIG outputs
PWR 3.3V power supply for SRC outputs
GND
GND
GND
PWR 3.3V Analog Power for PLLs
GND
Type
I,PU
PU
O
I
I
14.318 MHz Crystal Input
14.318 MHz Crystal Output
Ground for USB outputs
SMBus-compatible SCLOCK.This pin has an internal pull up, but is tri-stated in
power down.
power down.
3.3V LVTTL Input (Negative Edge Triggered)
When this pin is asserted LOW, all PLLs will transition to a safe default frequency.
This may be the POR defaults or a safe value stored in SMBUS registers.
(10% overclocking support through SMBUS)
Ground for SRC outputs
(10% overclocking support through SMBUS)
Ground for SRC outputs
(10% overclocking support through SMBUS)
Ground for SRC outputs
Includes 50% overclock support through SMBUS
Output Enable control for SRCT/C. Output enable control required by Minicard
specification. This pin has an internal pull up. 0 = Selected SRC output is enabled.
1 = Selected SRC output is disabled
Includes 50% overclock support through SMBUS
Ground for ATIG outputs
Includes 50% overclock support through SMBUS
(10% overclocking support through SMBUS)
Ground for SRC outputs
(10% overclocking support through SMBUS)
Ground for SRC outputs
Analog Ground
®
Type-3A buffer.
Description
CY28RS680
Page 2 of 20