cy28rs680 SpectraLinear Inc, cy28rs680 Datasheet - Page 12

• Manufacturer Part Number: cy28rs680
• Description: Clock Generator For Ati Rs5xx/6xx Chipsets
• Manufacturer: SpectraLinear Inc

Rev 1.0, March 28, 2007
RESET_IN# Assertion
RESET_IN# is a negative edge triggered signal. When
asserted, all PLLs will revert back to a safe default frequency.
The clock output will be allowed to turn off for a maximum of
4 ms. After this time the PLLs will output a locked clock at a
preselected safe frequency. The safe frequency is either
based upon the power on reset default values or upon the
value stored in the safe frequency register. The safe frequency
register is accessible via SMBUS (Bytes 18 & 19). The clock
outputs must be stable at the correct safe frequency at least
2 ms before the deassertion of RESET_IN#.
Dial-A-Frequency (CPU. SRC and ATIG)
Figure 1 shows a classical PLL block circuit. The PLL is
designed to allow overclocking capabilities.
implement a Spectra Linear feature called Dial-A-Frequency
(DAF). This feature allows users to overclock their systems by
slowly stepping up the CPU, SRC, or ATIG frequency. When
the programmable output frequency feature is enabled, the
CPU, SRC and ATIG frequencies are determined by the
following equation:
Fout= G * N/M or Fout = G2 * N, where G2 = G/M
or
Fout = (N*Fout)/(M*O)
Figure 3. RESET_IN# Assertion/Deassertion Waveform
The RS680
'N' and 'M' are the values programmed in Programmable
Frequency Select N-Value Register and M-Value Register,
respectively. 'G' stands for the PLL Gear Constant, which is
determined by the programmed value of FS[C:A]. See tables
below for the Gear Constant for each Frequency selection.
The SRC and ATIG only allow the user control of the N
register; the M value is fixed and documented in the tables
below. The user may change only the N value if required. In
this mode, the user writes the desired N value into the DAF
I2C registers. CPU overclocking allows the user to change
both the M and N values.
Note: For the CPU overclocking, the user cannot change only the M value but
must change both the M and the N values at the same time, if they require a
change to the M value
Associated Register Bits
Prog_CPU_EN - This bit enables CPU DAF mode. By default,
it is not set. When set, the operating frequency is determined
by the values entered into the CPU_DAF_N register. Note:
The CPU_DAF_N and M registers must contain valid values
before Prog_CPU_EN is set. Default = 0, (No DAF).
.
CY28RS680
Page 12 of 20