cy2314anz Cypress Semiconductor Corporation., cy2314anz Datasheet - Page 4

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cy2314anz

Manufacturer Part Number
cy2314anz
Description
14 Output, 3.3v Sdram Buffer For Desktop Pcs With 3 Dimms
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Switching Characteristics
Switching Waveforms
Document #: 38-07143 Rev. *A
All Outputs Rise/Fall Time
Output-Output Skew
Duty Cycle Timing
t
t
t
t
t
t
t
Notes:
Parameter
3
4
5
6
7
8
9
4.
5.
OUTPUT
OUTPUT
All parameters specified with loaded outputs.
Duty cycle of input clock is 50%. Rising and falling edge rate of the input clock is greater than 1 V/ns.
OUTPUT
Maximum Operating Frequency
Duty Cycle
Rising Edge Rate
Falling Edge Rate
Output to Output Skew
SDRAM Buffer LH Prop. Delay
SDRAM Buffer HL Prop. Delay
SDRAM Buffer Enable Delay
SDRAM Buffer Disable Delay
t
0.4V
3
1.5V
1.5V
2.4V
t
5
[3, 5]
Name
= t
t
2
[3]
1.5V
[3]
2
1.5V
[4]
t
Over the Operating Range
1
[3]
t
1
2.4V
0.4V
[3]
t
[3]
4
[3]
[3]
1.5V
Measured at 1.5V
Measured between 0.4V and 2.4V
Measured between 2.4V and 0.4V
All outputs equally loaded
Input edge greater than 1 V/ns
Input edge greater than 1 V/ns
Input edge greater than 1 V/ns
Input edge greater than 1 V/ns
Test Conditions
3.3V
0V
–250
Min.
45.0
0.9
0.9
1.0
1.0
1.0
1.0
Typ.
50.0
1.5
1.5
3.5
3.5
20
5
CY2314ANZ
Max.
+250
55.0
100
4.0
4.0
5.0
5.0
12
30
Page 4 of 8
Unit
MHz
V/ns
V/ns
ps
ns
ns
ns
ns
%
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