cy29949ait Cypress Semiconductor Corporation., cy29949ait Datasheet
cy29949ait
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cy29949ait Summary of contents
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Clock Distribution Buffer Features • 2.5V or 3.3V operation • 200-MHz clock support • LVPECL or LVCMOS/LVTTL clock input • LVCMOS-/LVTTL-compatible outputs • 15 clock outputs: drive clock lines • 1X and ...
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Pin Description Pin Name PWR 6 PECL_CLK 7 PECL_CLK TCLK(0,1) 49, 51 QA(1,0) VDDC 42, 44, 46 QB(2:0) VDDC 31, 33, 35, 37 QC(3:0) VDDC 16, 18, 20, 22, QD(5:0) VDDC 24 10, 11, 12 ...
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Maximum Ratings Maximum Input Voltage Relative ............ V SS Maximum Input Voltage Relative ............. V DD Storage Temperature: ................................–65° 150°C Operating Temperature: ................................ –40°C to +85°C Maximum ESD Protection............................................... 2 kV ...
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AC Parameters ( 3.3V ±10% or 2.5V ±5%, over the specified temperature range) DD DDC Parameter Description [7] Fmax Input Frequency [7] Tpd PECL_CLK to Q Delay [7] TCLK to Q Delay [7] PECL_CLK to Q Delay ...
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... PECL_CLK Figure 3. Propagation Delay (TPD) Test Reference LVCMOS_CLK Q Figure 4. LVCMOS Propagation Delay (TPD) Test Reference Ordering Information Part Number CY29949AI 52 Pin TQFP CY29949AIT 52 Pin TQFP - Tape and Reel CY29949AC 52 Pin TQFP CY29949ACT 52 Pin TQFP - Tape and Reel Document #: 38-07289 Rev ...
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Package Drawing and Dimensions 52-Lead Thin Plastic Quad Flat Pack ( 1.0 mm) A52B All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-07289 Rev. *D © ...
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Document History Page Document Title: CY29949 2.5V or 3.3V 200-MHz 1:15 Clock Distribution Buffer Document Number: 38-07289 REV. ECN NO. Issue Date ** 111100 02/01/02 *A 116783 08/14/02 *B 118463 09/09/02 *C 122881 12/22/02 *D 130132 11/07/03 Document #: 38-07289 ...