cy2v9950 Cypress Semiconductor Corporation., cy2v9950 Datasheet - Page 3

no-image

cy2v9950

Manufacturer Part Number
cy2v9950
Description
200-mhz Multi-output Zero Delay Buffer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Document #: 38-07436 Rev. *A
Table 4. Frequency Range Select
The PE pin determines whether the outputs synchronize to the
rising edge or the falling edge of the reference signal, as
indicated in Table 5.
Table 5. PE Settings
The CY2V9950 features split power supply buses for Banks 1
and 2, Bank 3 and Bank 4, which enables the user to obtain
both 3.3V and 2.5V output signals from one device. The core
power supply (VDD) must be set a level which is equal or
higher than that on any one of the output power supplies.
Absolute Maximum Conditions
DC Electrical Specifications @ 2.5V
V
V
V
V
T
T
T
ESD
Ø
Ø
UL-94
MSL
F
V
V
V
V
V
V
I
Notes:
Parameter
Parameter
IL
7.
8.
A
DD
DD
IN(MIN)
IN(MAX)
S
J
IT
DD
IL
IH
IHH
IMM
ILL
JC
JA
[8]
VDDQ1/3/4 must not be set at a level higher than that of VDD. They can be set at different levels from each other, e.g., VDD = 3.3V, VDDQ1 = 3.3V, VDDQ3
= 2.5V and VDDQ4 = 2.5V.
These Inputs are normally wired to VDD, GND or unconnected. Internal termination resistors bias unconnected inputs to VDD/2.
HBM
[8]
[8]
FS
M
H
L
PE
H
L
Operating Voltage
Operating Voltage
Input Voltage
Input Voltage
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
ESD Protection (Human Body Model)
Dissipation, Junction to Case
Dissipation, Junction to Ambient
Flammability Rating
Moisture Sensitivity Level
Failure in Time
2.5 Operating Voltage
Input LOW Voltage
Input HIGH Voltage
Input HIGH Voltage
Input MID Voltage
Input LOW Voltage
Input Leakage Current
Description
Description
PLL Frequency Range
48 to 100 MHz
96 to 200 MHz
24 to 50 MHz
Synchronization
Negative
Positive
2.5V ± 5%
REF, FB, PE, and sOE# Inputs
3-Level Inputs
(TEST, FS, nF[1:0])
(These pins are normally wired to
VDD,GND or unconnected)
V
(REF, PE, and FB inputs)
IN
= V
Functional @ 2.5V ± 5%
Functional @ 3.3V ± 10%
Relative to V
Relative to V
Non Functional
Functional
Functional
MIL-STD-883, Method 3015
Mil-Spec 883E Method 1012.1
JEDEC (JESD 51)
@1/8 in.
Manufacturing Testing
DD
/G
Conditions
ND
Table 6. Power Supply Constraints
Governing Agencies
The following agencies provide specifications that apply to the
CY2V9950. The agency name and relevant specification is
listed below.
,V
Condition
Agency Name
DD
SS
DD
UL-194_V0
VDD
3.3V
2.5V
JEDEC
= Max
IEEE
MIL
3.3V or 2.5V
VDDQ1
2.5V
JESD 51 (Theta JA)
JESD 65 (Skew, Jitter)
1596.3 (Jiter Specs)
94 (Moisture Grading)
883E Method 1012.1 (Therma Theta JC)
V
V
[7]
V
DD
DD
SS
2.375
Min.
2000
Min.
2.25
2.97
–65
–40
1.7
–5
/2–0.2
– –0.4
– 0.3
3.3V or 2.5V
VDDQ3
Specification
V – 0
105
2.5V
42
10
1
V
V
2.625
Max.
DD
DD
[7]
0.7
0.2
0.4
Max.
+150
2.75
3.63
+85
155
5
/2 +
+ 0.3
CY2V9950
3.3V or 2.5V
VDDQ4
Page 3 of 9
2.5V
Unit
°C/W
°C/W
Unit
ppm
µA
V
V
V
V
V
V
°C
°C
°C
V
V
V
V
V
[7]
[+] Feedback

Related parts for cy2v9950