cy2pp326 Cypress Semiconductor Corporation., cy2pp326 Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/1/180/cypress_semiconductor_corporation__sml.jpg)
cy2pp326
Manufacturer Part Number
cy2pp326
Description
2 X 2 Clock And Data Switch Buffer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY2PP326.pdf
(9 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Document #: 38-07506 Rev.*D
Timing Definitions
Figure 4. Propagation Delay (T
VEE
VIH
VCC
VIL
20-80%
A n o t h e r
O u t p u t
O u t p u t
C l o c k
C l o c k
C l o c k
I n p u t
tr, tf,
for both CLKA or CLKB to Output Pair, PECL/ECL to PECL/ECL
VPP
VPP range
0.1V - 1.3V
T P L H ,
Figure 2. PECL/ECL Input Waveform Definitions
T P D
PD
), output pulse skew (|t
Figure 3. ECL/LVPECL Output
VCMR M in = VEE + 1.2
PLH
-t
T P H L
VCM R Max = VCC
PHL
|), and output-to-output skew (t
t S K ( O )
V P P
FastEdge™ Series
VCM R
VO
V O
CY2PP326
SK(O)
Page 5 of 9
)