stv8226t STMicroelectronics, stv8226t Datasheet - Page 49

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stv8226t

Manufacturer Part Number
stv8226t
Description
Multistandard Tv Audio Processor And Digital Sound Demodulator
Manufacturer
STMicroelectronics
Datasheet
STV82x6
9.7
Address (hex): 22h
Type: R/W
Address (hex): 25h
Type: R/W
CAROFFSET1[7:0]
IAGC_REF[7:0]
SQTH1[7:0]
Bit Name
Bit Name
Bit Name
Bit 7
Bit 7
CAROFFSET1
Demodulator Channel 2
IAGCR
Bit 6
Bit 6
00111100
00000000
10001000
Reset
Reset
Reset
The squelch detector measures the level of high frequency noise (> 40 kHz) and compares it to
the threshold level (SQTH). If the level is below this value, the S/N of the FM signal is
considered to be acceptable. Values are given for FM with standard deviation.
SQTH
FAh
77h
3Ch
23h
19h
This value is used correct the carrier frequency offset of the incoming IF signal. Automatic
frequency control in FM mode can be implemented by registers
A DCO frequency offset (in two’s complement format) is added to the pre-programming value
by AUTOTSD in the CARFQ1 registers (corresponding to the standard IF carrier frequency).
The programmable carrier offset ranges from -192 kHz to +190.5 kHz with a resolution of
1.5 kHz.
For standard FM deviation, the value displays by FM_DCL can be directly loaded in
CAROFFSET1 to exactly compensate the carrier offset on Channel 1
Sets the mean value of the internal AGC, used for QPSK demodulation. The default setting
corresponds to half full scale amplitude at the baseband PLL input.
Bit 5
Bit 5
Channel 1 DCO Carrier Offset Compensation
Channel 2 Internal AGC Reference for QPSK
S/N (dB)
0
10
15 (Default)
20
25
CAROFFSET1[7:0] (S)
Bit 4
Bit 4
IAGC_REF[7:0]
Bit 3
Bit 3
Function
Function
Function
Bit 2
Bit 2
FM_DCR
Bit 1
Bit 1
and FM_DCL.
Register List
Bit 0
Bit 0
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