nts0101 NXP Semiconductors, nts0101 Datasheet - Page 14

• Manufacturer Part Number: nts0101
• Description: Nts0101 Dual Supply Translating Transceiver; Open Drain; Auto Direction Sensing
• Manufacturer: NXP Semiconductors

NXP Semiconductors
NTS0101
Product data sheet
14.3 Input driver requirements
14.4 Output load considerations
14.5 Power up
14.6 Enable and disable
The gate bias voltage of the pass gate transistor (T3) is set at approximately one
threshold voltage above the V
transition the output one-shot accelerates the output transition by switching on the PMOS
transistors (T1, T2) bypassing the 10 kΩ pull-up resistors and increasing current drive
capability. The one-shot is activated once the input transition reaches approximately
V
acceleration time the driver output resistance is between approximately 50 Ω and 70 Ω. To
avoid signal contention and minimize dynamic I
circuit to turn-off before applying a signal in the opposite direction. Pull-up resistors are
included in the device for DC current sourcing capability.
As the NTS0101 is a switch type translator, properties of the input driver directly effect the
output signal. The external open-drain or push-pull driver applied to an I/O determines the
static current sinking capability of the system; the max data rate, HIGH-to-LOW output
transition time (t
impedance and edge-rate of the external driver. The limits provided for these parameters
in the datasheet assume a driver with output impedance below 50 Ω is used.
The maximum lumped capacitive load that can be driven is dependant upon the one-shot
pulse duration. In cases with very heavy capacitive loading there is a risk that the output
will not reach the positive rail within the one-shot pulse duration.
To avoid excessive capacitive loading and to ensure correct triggering of the one-shot it's
recommended to use short trace lengths and low capacitance connectors on NTS0101
PCB layouts. To ensure low impedance termination and avoid output signal oscillations
and one-shot re-triggering, the length of the PCB trace should be such that the round trip
delay of any reflection is within the one-shot pulse duration (approximately 50 ns).
During operation V
V
first. There is no special power-up sequencing required. The NTS0101 includes circuitry
that disables all output ports when either V
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state. The disable time (t
load) indicates the delay between when OE goes LOW and when outputs actually
become disabled. The enable time (t
for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the
high-impedance OFF-state during power-up or power-down, pin OE should be tied to
GND through a pull-down resistor, the minimum value of the resistor is determined by the
current-sourcing capability of the driver.
CCI
CC(A)
/2; it is de-activated approximately 50 ns after the output reaches V
≥ V
CC(B)
Dual supply translating transceiver; open drain; auto direction sensing
does not damage the device, so either power supply can be ramped up
All information provided in this document is subject to legal disclaimers.
THL
CC(A)
) and propagation delay (t
Rev. 2 — 27 April 2011
must never be higher than V
CC
level of the low-voltage side. During a LOW-to-HIGH
en
) indicates the amount of time the user must allow
CC(A)
PHL
CC
or V
) are dependent upon the output
, the user should wait for the one-shot
CC(B)
CC(B)
, however during power-up
is switched off.
dis
with no external
NTS0101
© NXP B.V. 2011. All rights reserved.
CCO
/2. During the
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