MC10EP51DTG ON Semiconductor, MC10EP51DTG Datasheet - Page 8

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MC10EP51DTG

Manufacturer Part Number
MC10EP51DTG
Description
IC FLIP FLOP ECL RST/CLK 8TSSOP
Manufacturer
ON Semiconductor
Series
10EPr
Type
D-Typer
Datasheet

Specifications of MC10EP51DTG

Function
Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
1
Frequency - Clock
3GHz
Delay Time - Propagation
320ps
Trigger Type
Positive Edge
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Logic Family
ECL
Technology
ECL
Number Of Bits
1
Number Of Elements
1
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Invert/Non-Invert
Operating Supply Voltage (typ)
-3.3/-5/3.3/5V
Package Type
TSSOP
Propagation Delay Time
0.5ns
Low Level Output Current
50mA
High Level Output Current
-50mA
Operating Supply Voltage (min)
-3/3V
Operating Supply Voltage (max)
-5.5/5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Compliant
Other names
MC10EP51DTGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10EP51DTG
Manufacturer:
ON Semiconductor
Quantity:
135
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
ORDERING INFORMATION
Specifications Brochure, BRD8011/D.
MC10EP51D
MC10EP51DG
MC10EP51DR2
MC10EP51DR2G
MC10EP51DT
MC10EP51DTG
MC10EP51DTR2
MC10EP51DTR2G
MC10EP51MNR4G
MC100EP51D
MC100EP51DG
MC100EP51DR2
MC100EP51DR2G
MC100EP51DT
MC100EP51DTG
MC100EP51DTR2
MC100EP51DTR2G
MC100EP51MNR4G
Device
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
− ECL Clock Distribution Techniques
− Designing with PECL (ECL at +5.0 V)
− ECLinPSt I/O SPiCE Modeling Kit
− Metastability and the ECLinPS Family
− Interfacing Between LVDS and ECL
− The ECL Translator Guide
http://onsemi.com
TSSOP−8
TSSOP−8
TSSOP−8
TSSOP−8
TSSOP−8
TSSOP−8
TSSOP−8
TSSOP−8
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
Package
SOIC−8
SOIC−8
SOIC−8
SOIC−8
SOIC−8
SOIC−8
SOIC−8
SOIC−8
DFN8
DFN8
8
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
1000 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
1000 / Tape & Reel
100 Units / Rail
100 Units / Rail
100 Units / Rail
100 Units / Rail
98 Units / Rail
98 Units / Rail
98 Units / Rail
98 Units / Rail
Shipping

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