MC10EP51DTG ON Semiconductor, MC10EP51DTG Datasheet

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MC10EP51DTG

Manufacturer Part Number
MC10EP51DTG
Description
IC FLIP FLOP ECL RST/CLK 8TSSOP
Manufacturer
ON Semiconductor
Series
10EPr
Type
D-Typer
Datasheet
1.MC10EP51DTG.pdf (11 pages)

Specifications of MC10EP51DTG

Function
Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
1
Frequency - Clock
3GHz
Delay Time - Propagation
320ps
Trigger Type
Positive Edge
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Logic Family
ECL
Technology
ECL
Number Of Bits
1
Number Of Elements
1
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Invert/Non-Invert
Operating Supply Voltage (typ)
-3.3/-5/3.3/5V
Package Type
TSSOP
Propagation Delay Time
0.5ns
Low Level Output Current
50mA
High Level Output Current
-50mA
Operating Supply Voltage (min)
-3/3V
Operating Supply Voltage (max)
-5.5/5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Compliant
Other names
MC10EP51DTGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
MC10EP51DTG
Manufacturer:
ON Semiconductor
Quantity:
135
MC10EP51, MC100EP51
3.3V / 5V ECL D Flip-Flop
with Reset and Differential
Clock
Description
The device is functionally equivalent to the EL51 and LVEL51
devices.
enters the master portion of the flip−flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition
of the clock. The differential clock inputs of the EP51 allow the device
to be used as a negative edge triggered flip-flop.
under open input conditions. When left open, the CLK input will be
pulled down to V
Features
•
•
•
•
•
•
•
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 7
The MC10/100EP51 is a differential clock D flip−flop with reset.
The reset input is an asynchronous, level triggered signal. Data
The differential input employs clamp circuitry to maintain stability
The 100 Series contains temperature compensation.
with V
with V
350 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: V
NECL Mode Operating Range: V
Open Input Default State
Safety Clamp on Inputs
Pb−Free Packages are Available
EE
EE
= −3.0 V to −5.5 V
= 0 V
EE
and the CLK input will be biased at V
CC
CC
= 3.0 V to 5.5 V
= 0 V
CC
1
/2.
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
H
K
5S
3N
M
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
SOIC−8
Application Note AND8002/D.
DFN8
8
= MC10
= MC100
= MC10
= MC100
= Date Code
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
MARKING DIAGRAMS*
ALYWG
HEP51
ALYW
HP51
Publication Order Number:
A
L
Y
W
G
1
G
G
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
8
1
MC10EP51/D
8
1
KEP51
ALYWG
ALYW
1
KP51
G
G
4

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MC10EP51DTG Summary of contents

Page 1

MC10EP51, MC100EP51 3.3V / 5V ECL D Flip-Flop with Reset and Differential Clock Description The MC10/100EP51 is a differential clock D flip−flop with reset. The device is functionally equivalent to the EL51 and LVEL51 devices. The reset input is an asynchronous, ...

Page 2

RESET Flip-Flop CLK 3 CLK 4 Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 3. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of ...

Page 3

Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out T Operating Temperature Range A T Storage Temperature ...

Page 4

Table 6. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 5

Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 13 Output LOW Voltage (Note 13 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 6

Table 10. 100EP DC CHARACTERISTICS, NECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 19 Output LOW Voltage (Note 19 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 7

FREQUENCY (MHz) Figure Driver Device ...

Page 8

... ORDERING INFORMATION Device MC10EP51D MC10EP51DG MC10EP51DR2 MC10EP51DR2G MC10EP51DT MC10EP51DTG MC10EP51DTR2 MC10EP51DTR2G MC10EP51MNR4G MC100EP51D MC100EP51DG MC100EP51DR2 MC100EP51DR2G MC100EP51DT MC100EP51DTG MC100EP51DTR2 MC100EP51DTR2G MC100EP51MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...

Page 9

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 10

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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