MX23L12854 Macronix International, MX23L12854 Datasheet - Page 9

• Manufacturer Part Number: MX23L12854
• Description: 128M-BIT Low Voltage / Serial Mask ROM Memory with 50MHz SPI Bus Interface
• Manufacturer: Macronix International

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DataSheet
4
POWER-UP AND POWER-DOWN
At Power-up and Power-down, the device must not be
selected (that is Chip Select (S#) must follow the voltage
applied on VCC ) until VCC reaches the correct value:
- VCC(min) at Power-up, and then for a further delay of
tVSL
- VSS at Power-down
Usually a simple pull-up resistor on Chip Select (S#) can
be used to insure safe and proper Power-up and Power-
down.
To avoid data corruption and inadvertent write operations
during power up, a Power On Reset (POR) circuit is
included. The logic inside the device is held reset while
VCC is less than the POR threshold value, VWI -- all
operations are disabled, and the device does not respond
to any instruction.
These values are specified in Table 2.
Figure 6. Power-up Timing
P/N: PM1141
U
.com
V CC (max)
V CC (min)
V WI
V CC
Reset State
Device
of the
Chip Selection Not Allowed
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tPUW
tVSL
If the delay, tVSL, has elapsed, after VCC has risen
above VCC (min), the device can be selected for READ
instructions even if the tPUW delay is not yet fully
elapsed.
At Power-up, the device is in the following state:
- The device is in the Standby mode.
Normal precautions must be taken for supply rail
decoupling, to stablise the VCC feed. Each device in a
system should have the VCC rail decoupled by a suitable
capacitor close to the package pins.
(Generally, this capacitor is of the order of 0.1uF).
At Power-down, when VCC drops from the operating
voltage, to below the POR threshold value, VWI , all
operations are disabled and the device does not respond
to any instruction.
Read Access allowed
MX23L12854
Device fully
accessible
time
REV. 1.1, MAY. 04, 2005