MX23L12854 Macronix International, MX23L12854 Datasheet - Page 4

• Manufacturer Part Number: MX23L12854
• Description: 128M-BIT Low Voltage / Serial Mask ROM Memory with 50MHz SPI Bus Interface
• Manufacturer: Macronix International

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DataSheet
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SPI MODES
These devices can be driven by a microcontroller with its
SPI peripheral running in either of the two following modes:
- CPOL=0, CPHA=0
- CPOL=1, CPHA=1
For these two modes, input data is latched in on the rising
edge of Serial Clock (C), and output data is available from
Figure 1. Bus Master and Memory Devices on the SPI Bus
Note: 1. Hold (HOLD#) signals should be driven, High or Low as appropriate.
Figure 2. SPI Modes Supported
P/N: PM1141
U
.com
CPOL
0
1
SPI Interface with
(CPOL, CPHA) =
CS3
(0, 0) or (1, 1)
(ST6, ST7, ST9,
CPHA
ST10, Others)
Bus Master
0
1
CS2
CS1
D
Q
C
C
SDO
SDI
SCK
MSB
S#
SPI Memory
C Q D
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Device
HOLD#
4
the falling edge of Serial Clock (C).
The difference between the two modes, as shown in Figure
2, is the clock polarity when the bus master is in Stand-by
mode and not transferring data:
- C remains at 0 for (CPOL=0, CPHA=0)
- C remains at 1 for (CPOL=1, CPHA=1)
S#
SPI Memory
C Q D
Device
MX23L12854
HOLD#
MSB
S#
SPI Memory
C Q D
Device
HOLD#
REV. 1.1, MAY. 04, 2005