NL10276AC24_05 NEC, NL10276AC24_05 Datasheet - Page 15

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NL10276AC24_05

Manufacturer Part Number
NL10276AC24_05
Description
TFT COLOR LCD MODULE
Manufacturer
NEC
Datasheet

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Table 5. CLK reverse signal
note 9 : CKS is "0", when CNTSEL is "H" or "open".
MOD1
note 8 : This delay value is typical at Ta = 25˚C, V
CKS
0
0
1
1
0
1
q Variation of CLK delay by temperature drift. (as reference)
w Variation of CLK delay time against V
The temperature constant of CLK delay is 0.2 % / ˚C.
Calculated example:
Increase of 35 % / V in case of rising from V
Decrease of 48 % / V in case of falling from V
Calculated example:
In case that delay time is 20 ns at Ta = 25˚C;
(a) In case of Ta rising to 50 ˚C.
(b) In case of Ta falling to 0˚C.
In case that delay time is 20 ns at V
(a) In case of V
(b) In case of V
power supply, the delay will be changed also.
See the following references.
Data is sampled on rising edge of CLK.
Data is sampled on falling edge of CLK.
MOD0
Increase of delay time
So, the total delay time is 21 ns at Ta = 50˚C.
Decrease of delay time
So, the total delay time is 19 ns at Ta = 0˚C.
Decrease of delay time
So, the total delay time is 17.9 ns at V
Increase of delay time
So, the total delay time is 22.88 ns at V
0
1
0
1
CC
CC
rising to 3.6 V.
falling to 3.0 V.
Upper limit of VD6 to VD0 CLK-delay setting (HEXADECIMAL)
(3.3 V-3.0 V)
(50˚C-25˚C)
(3.3 V-3.6 V)
(0˚C-25˚C)
CC
CC
= 3.3 V.
voltage change. (as reference)
FUNCTION
CC
CC
CC
0.002
0.002
CC
= 3.3 V. By changing ambient temperature and
0.48
CC
= 3.6 V.
0.35
= 3.3 V.
= 3.0 V.
= 3.3 V.
Prohibit
6BH
59H
7FH
20ns = –1 ns
20 ns = +2.88 ns
20 ns = +1 ns
20 ns = –2.1 ns
NL10276AC24-05
15

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