SC16C752BIBS Philips Semiconductors, SC16C752BIBS Datasheet - Page 30

• Manufacturer Part Number: SC16C752BIBS
• Description: 5 V/ 3.3 V and 2.5 V dual UART/ 5 Mbit/s (max.)/ with 64-byte FIFOs
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 14443
Product data
7.14 FIFO ready register
The FIFO ready register provides real-time status of the transmit and receive FIFOs
of both channels.
Table 22:
The FIFO Rdy register is a read-only register that can be accessed when any of the
two UARTs is selected CSA or CSB = 0, MCR[2] (FIFO Rdy Enable) is a logic 1, and
loop-back is disabled. The address is 111.
Bit
7:6
5
4
3:2
1
0
Symbol
FIFO Rdy[7:6]
FIFO Rdy[5]
FIFO Rdy[4]
FIFO Rdy[3:2]
FIFO Rdy[1]
FIFO Rdy[0]
FIFO Ready Register bits description
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 03 — 14 December 2004
Description
Unused; always 0.
RX FIFO B status. Related to DMA.
RX FIFO A status. Related to DMA.
Unused; always 0.
TX FIFO B status. Related to DMA.
TX FIFO A status. Related to DMA.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
SC16C752B
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