LTC6909 Linear Dimensions Semiconductor, LTC6909 Datasheet - Page 11

• Manufacturer Part Number: LTC6909
• Description: Multiphase Silicon Oscillator
• Manufacturer: Linear Dimensions Semiconductor

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OPERATION
Spread Spectrum Frequency Modulation
The LTC6909 can operate with spread spectrum frequency
modulation (SSFM). In this mode, the oscillator’s frequency
is modulated by a pseudorandom noise (PRN) signal
to spread the oscillator’s energy over a wide frequency
band. This spreading decreases the peak electromagnetic
radiation levels and improves electromanetic compatibility
(EMC) performance.
The amount of frequency spreading is fi xed at 20% (±10%),
where frequency spreading is defi ned as:
Frequency Spreading (in %) = 100 • (f
The I
a multiplying digital-to-analog converter (MDAC) refer-
enced to I
psuedorandom noise-like manner between 0.9 • I
1.1 • I
a pseudorandom noise-like manner between 0.9 • f
and 1.1 f
To disable the SSFM, connect one of the active outputs
to the MOD pin. An AC detector circuit shuts down the
modulation circuitry if a frequency in the vicinity of the
output frequency is detected at the MOD pin.
As stated previously, the modulating waveform is a pseu-
dorandom noise-like waveform. The pseudorandom signal
MASTER
SET
OUT
. This causes the output frequency to vary in
SET
.
current is a dynamic signal generated by
and lowpass fi ltered. I
128 STEPS
f
f
OUT
OUT
t
STEP
+ 10%
– 10%
= N/f
OUT
MASTER
MAX
– f
MIN
varies in a
t
)/f
STEP
SET
OUT
and
OUT
Figure 3
t
REPEAT
TIME
is generated by a linear feedback shift register that is 15
bits long. The pseudorandom sequence will repeat every
(2
rate below 13Hz for output frequencies up to 6.67MHz.
Seven bits of the shift register are sent in parallel to the
MDAC which produces the modulating current waveform.
Being a digitally generated signal, the output of the MDAC
is not a perfectly smooth waveform, but consists of (2
discrete steps that change every shift register clock cycle.
Note that the shift register clock is the output frequency,
f
setting, which is determined by the state of the MOD pin.
The MOD pin should be tied to ground for the N = 16 set-
ting. Floating the MOD pin selects N = 32. The MOD pin
should be tied to V
The output of the MDAC is then fi ltered by a lowpass fi lter
with a corner frequency set to the modulation rate (f
This limits the rate of frequency change and softens the
corners of the frequency control signal, but allows the
waveform to fully settle at each frequency step. The rise
and fall times of this single pole fi lter are approximately
0.35/f
regulators, as discussed in the Applications Information
section. Figure 3 illustrates how the output frequency
varies over time.
OUT
15
, divided by N, where N is the modulation rate divider
– 1) • N clock cycles. This guarantees a repetition
CORNER
. This is benefi cial for clocking switching
t
REPEAT
= ((2
+
for the N = 64 setting.
15
– 1) • N)/f
OUT
6909 F03
LTC6909
11
OUT
/N).
6909f
7
)