LTC6257 Linear Technology, LTC6257 Datasheet - Page 13

• Manufacturer Part Number: LTC6257
• Description: 65uA Power Efficient Rail-to-Rail I/O Op Amps
• Manufacturer: Linear Technology

operAtion
The LTC6255 family input signal range extends beyond
the negative and positive power supplies. The output can
even extend all the way to the negative supply with the
proper external pull-down current source. Figure 1 depicts
a Simplified Schematic of the amplifier. The input stage
is comprised of two differential amplifiers, a PNP stage
Q1/Q2 and NPN stage Q3/Q4 that are active over different
ranges of common mode input voltage. The PNP stage
is active between the negative power supply to approxi-
mately 1V below the positive supply. As the input voltage
approaches the positive supply, transistor Q5 will steer the
tail current I
NPN differential pair and the PNP pair becomes inactive
ApplicAtions inForMAtion
Low Supply Voltage and Low Power Consumption
The LTC6255 family of operational amplifiers can operate
with power supply voltages from 1.8V to 5.25V. Each ampli-
fier draws only 65µA. The low supply voltage capability and
low supply current are ideal for portable applications.
High Capacitive Load Driving Capability and Wide
Bandwidth
The LTC6255 family is optimized for wide bandwidth
low power applications. They have an extremely high
gain-bandwidth to power ratio and are unity gain stable.
When the load capacitance increases, the increased ca-
pacitance at the output pushed the non-dominant pole
to lower frequency in the open loop frequency response,
worsening the phase and gain margin. They are designed
to directly drive up to 100nF capacitive load in unity gain
configuration (see Typical Performance Characteristics,
Capacitive Load Handling). Higher gain configurations
tend to have better capacitive drive capability than lower
gain configurations due to lower closed loop bandwidth
and hence higher phase margin.
1
to the current mirror Q6/Q7, activating the
for the remaining input common mode range. Also for the
input stage, devices Q17, Q18 and Q19 act to cancel the
bias current of the PNP input pair. When Q1/Q2 is active,
the current in Q16 is controlled to be the same as the
current Q1/Q2. Thus, the base current of Q16 is normally
equal to the base current of the input devices of Q1/Q2.
Similar circuitry (not shown) is used to cancel the base
current of Q3/Q4. The buffer and output bias stage uses
a special compensation technique to take full advantage
of the process technology to drive high capacitive loads.
The common emitter topology of Q14/Q15 enables the
output to swing from rail to rail.
Low Input Referred Noise
The LTC6255 family provides a low input referred noise
of 20nV/√Hz at 1kHz. The noise density will grow slowly
with the frequency in wideband range. The average noise
voltage density over 3MHz range is less than 24nV/√Hz.
The LTC6255 family is ideal for low noise and low power
signal processing applications.
Low Input Offset Voltage
The LTC6255 family has a low offset voltage of 350μV
maximum which is essential for precision applications. The
offset voltage is trimmed with a proprietary trim algorithm
to ensure low offset voltage over the entire common mode
voltage range.
Low Input Bias Current
The LTC6255 family uses a bias current cancellation circuit
to compensate for the base current of the input transistors.
When the input common mode voltage is within 200mV
of either rail, the bias cancellation circuit are no longer ac-
tive. For common mode voltages ranging from 0.2V above
LTC6255/LTC6256/LTC6257
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