LTC3775 Linear Technology, LTC3775 Datasheet - Page 8

• Manufacturer Part Number: LTC3775
• Description: High Frequency Synchronous Step-Down Voltage Mode DC/DC Controller
• Manufacturer: Linear Technology

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PIN FUNCTIONS
LTC3775
I
has an internal 100μA pull-down current, allowing the
topside current limit threshold to be programmed by
an external resistor connected to V
Applications.
I
pin has an internal 10μA pull-up current, allowing the
bottom side current limit threshold to be programmed
by an external resistor connected to SGND. See Current
Limit Applications.
FB (Pin 3): Error Amplifi er Input. The FB pin is connected
to a resistive divider from V
compensation network is also connected to this pin.
COMP (Pin 4): Error Amplifi er Output. Use an RC network
between the COMP pin and the FB pin to compensate the
feedback loop for optimum transient response.
SS (Pin 5): Soft-Start. Connect this pin to an external
capacitor, C
the voltage on the SS pin is less than the 0.6V internal
reference, the LTC3775 regulates the V
SS pin voltage instead of the 0.6V reference.
FREQ (Pin 6): Frequency Set. A resistor connected from
this pin to SGND sets the free-running frequency of the
internal oscillator. See Applications Information section
for resistor value selection details.
SGND (Pin 7): Signal Ground. All the internal low power
circuitry returns to the SGND pin. All feedback and soft-
start connections should return to SGND. SGND should
be Kelvin connected to a single point near the negative
terminal of the V
BG (Pin 8): Bottom Gate Drive. This pin drives the gate of
the bottom N-channel synchronous switch MOSFET. This
pin swings from PGND to INTV
INTV
driver and control circuits are powered from this voltage.
Bypass this pin to power ground with a low ESR ceramic
capacitor of value 4.7μF or greater (X5R or better).
SENSE (Pin 10): Topside Current Sensing Input. Con-
nect this pin to the switch node of the converter for top
MOSFET R
8
LIMT
LIMB
CC
(Pin 1): Topside Current Limit Set Point. This pin
(Pin 2): Bottom Side Current Limit Set Point. This
(Pin 9): Internal 5.2V Regulator Output. The gate
DS(ON)
SS
, to implement a soft-start function. When
OUT
current sensing. Alternatively, this pin
bypass capacitor.
OUT
to SGND. The feedback loop
CC
.
IN
. See Current Limit
FB
voltage to the
can be connected to a sense resistor at the drain of the
top MOSFET for more accurate current limit.
V
with a low ESR ceramic capacitor of value 1μF or greater
(X5R or better).
SW (Pin 12): Switch Node. Connect this pin to the source
of the upper power MOSFET. This pin is also used as the
input to the bottom side current limit comparator and the
zero-crossing reverse current comparator.
TG (Pin 13): Top Gate Drive. This pin drives the gate of
the top N-channel MOSFET. The TG driver draws power
from the BOOST pin and returns to the SW pin, providing
true fl oating drive to the top MOSFET.
BOOST (Pin 14): Top Gate Driver Supply. This pin should be
decoupled to SW with a 0.1μF low ESR ceramic capacitor.
An external Schottky diode from INTV
a fl oating charge-pump supply at BOOST. No other external
supplies are required.
MODE/SYNC (Pin 15): Pulse-Skipping Mode Enable/Sync
Pin. This multifunction pin provides pulse-skipping mode
enable/disable control and an external clock input for syn-
chronization of the internal oscillator. Pulling this pin below
1.2V (DC) or driving it with an external logic-level synchro-
nization signal disables pulse-skipping mode operation and
forces continuous operation. Pulling the pin above 1.2V
enables pulse-skipping mode operation. This pin has an
internal 50k pull-down resistor connected to SGND.
RUN/SHDN (Pin 16): Enable/Shutdown Input. Pulling this
pin above 1.22V enables the controller. Forcing this pin
below 1.22V causes the driver outputs to pull low. Pulling
this pin below 0.74V forces the LTC3775 into shutdown
mode. While in shutdown, the INTV
internal circuitry turns off and the supply current drops
below 14μA. This pin has an internal 1μA pull-up current that
allows the LTC3775 to power up if this pin is left fl oating.
PGND (Pin 17): Power Ground (Exposed Pad). The BG
driver returns to this pin. Connect PGND to the source of
the bottom power MOSFET and the V
capacitors. PGND is electrically isolated from SGND. The
exposed pad of the QFN package is connected to PGND.
IN
(Pin 11): Main Input Supply. Bypass this pin to PGND
CC
IN
CC
regulator and most
and INTV
to BOOST creates
CC
bypass
3775f