LTC3775 Linear Technology, LTC3775 Datasheet - Page 16

• Manufacturer Part Number: LTC3775
• Description: High Frequency Synchronous Step-Down Voltage Mode DC/DC Controller
• Manufacturer: Linear Technology

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LTC3775
APPLICATIONS INFORMATION
response at low load currents, constant frequency opera-
tion, and the ability to maintain regulation when sinking
current. See Figure 8 for a comparison of the effi ciency
at light loads for each mode.
In pulse-skipping mode, the LTC3775 reverse-current
comparator, IREV , monitors the SW pin for zero crossing
when the bottom gate, BG, is high. It turns off BG if the
inductor current reverses and the SW voltage goes above
GND. To prevent false tripping due to ringing on the SW
node when BG is fi rst turned on, there is a blanking time
of 200ns similar to the bottom side current limit blanking.
Under certain light load conditions, if the TG on-time is
short, the inductor current may reverse during the IREV
blanking time but the LTC3775 will only turn off BG after
the blanking time.
In applications where a low value inductor is used, the
high di/dt of the inductor ripple current together with the
parasitic series inductance of the bottom MOSFET, Q
and PCB trace inductance creates an opposing voltage to
the voltage drop across the R
IREV to trip early, before the inductor current reverses.
The parasitic series inductance of the PCB trace can be
minimized by connecting the SW pin closer to the drain
of Q
INTV
The LTC3775 features a P-channel low dropout linear
regulator (LDO) that supplies power to the INTV
the V
16
B
CC
IN
.
supply. INTV
Regulator
Figure 9. Comparison of Inductor Current Waveforms for Pulse-Skipping Mode and Forced Continuous Mode
DECREASING
CURRENT
LOAD
CC
powers the gate drivers and much
0A
0A
0A
DS(ON)
PULSE-SKIPPING MODE
of QB. This can cause
CC
pin from
B
,
0A
0A
0A
of the LTC3775’s internal circuitry. The LDO regulates the
voltage at the INTV
6.5V. The INTV
low ESR (X5R or better) ceramic capcitor of at least 4.7μF .
Good bypassing is needed to supply the high transient
currents required by the MOSFET gate drivers.
An internal undervoltage lockout (UVLO) monitors the volt-
age on INTV
drive voltage. If the INTV
threshold of 3.1V, the gate drive outputs remain low.
Thermal Considerations
The LTC3775 is offered in a 3mm × 3mm QFN package
(UD16) that has a thermal resistance R
The UD16 package has a lead pitch of 0.5mm.
The regulator can supply up to 50mA of gate drive load cur-
rent. The expected LDO load current can be calculated from
the gate charge requirement of the external MOSFET:
where:
I
3.5mA is the quiescent current of LTC3775
Q
Q
f
INTVCC
SW
G(QT)
G(QB)
is the switching frequency
FORCED CONTINUOUS
is the total gate charge of the top MOSFET
is the total gate charge of the bottom MOSFET
= (f
CC
SW
to ensure that the LTC3775 has suffi cient gate
CC
) • (Q
pin must be bypassed to ground with a
CC
pin to 5.2V when V
G(QT)
CC
3775 F09
+ Q
voltage falls below the UVLO
G(QB)
) + 3.5mA
TH(JA)
IN
is greater than
of 68°C/W.
3775f