LTC1705 Linear Technology, LTC1705 Datasheet
LTC1705
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LTC1705 Summary of contents
Page 1
... PGOOD flag indicates that all three outputs are within 10% of their regulated values. A shutdown circuit disables all three outputs if the RUN/SS pin is pulled to ground. In this mode, the LTC1705 supply current drops to below 100 A. , LTC and LT are registered trademarks of Linear Technology Corporation. ...
Page 2
... I = 0mA VOUTCLK RUN/ (Rising Edge) RUN/SS RUN/ Programmed from 0. (Note 10 3.3V to 5.5V CC (Note ORDER PART TOP VIEW NUMBER 1 28 BGIO 2 27 BOOSTIO LTC1705EGN 3 26 TGIO 4 25 SWIO INCLK OUTCLK 7 22 PGOOD 8 21 COMPIO 9 20 FBIO 10 19 ...
Page 3
... PBAD Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1705 is guaranteed to meet performance specifications from Specifications over the – operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: All currents into device pins are positive ...
Page 4
... LTC1705 W U TYPICAL PERFOR A CE CHARACTERISTICS V vs Temperature SENSEC 1.315 1.3V 1.310 OUT 1.305 1.300 1.295 1.290 1.285 –50 – TEMPERATURE ( C) V Load Regulation SENSEC 0 1.6V OUT 0 –0.8 –1.6 –2.4 –3 (A) LOAD V vs Temperature FBIO ...
Page 5
... OUTCLK 450 0 400 –0.02 350 300 –0.04 250 –0.06 200 –0.08 150 100 –0.10 –50 – TEMPERATURE ( C) LTC1705 Current Limit Threshold vs Temperature 5V 1.6V, V OUT OUT 24.9k, QTC = QBC = 2 FDS6670A IMAXC 1705 G08 12 10 –50 –25 0 ...
Page 6
... LTC1705 W U TYPICAL PERFOR A CE CHARACTERISTICS V Short-Circuit Current vs OUTCLK V INCLK –150 –190 –230 –270 –310 –350 3 3.5 4 4.5 5 5.5 V (V) INCLK 1705 G16 OSC CC 650 610 570 530 490 450 3 3.5 4 4 (V) CC 1705 G20 VID Input Threshold vs Temperature 1 ...
Page 7
... PGND (Pin 7): Power Ground. The BGC and BGIO drivers return to this pin. Connect PGND to a high-current ground node in close proximity to the sources of external MOSFETs QBC and QBIO, and the V I (Pin 8): Core Supply Current Limit Set. See I MAXC LTC1705 V vs Temperature SHDN 0. ...
Page 8
... CTIO S RUN/SS (Pin 9): SoftStart. Pulling RUN/SS to GND exter- nally shuts down the LTC1705 and turns off all the external MOSFET switches. The quiescent supply current drops below 100 A. A capacitor from RUN/SS to GND controls the turn on time and rate of rise of the core and I/O output voltages at power up ...
Page 9
... W BLOCK DIAGRA IO PWRBAD CLK PWRBAD CORE PWRBAD LTC1705 9 ...
Page 10
... Gnd 1.40V 11100 Float 1.35V 11101 11110 Gnd 1.30V * Float 1.25V 11111 *01111 and 11111 are defined by Intel to signify “no CPU.” The LTC1705 generates the output voltages shown if these codes are selected BOOSTIO 100 F 0 OSCIO 1000pF 1000pF 2k V FBIO ...
Page 11
... CPU. The power lost to heat in the LTC1705 section of the system is relatively low, minimizing the added heat near the CPU. Fast Transient Response The LTC1705 core and I/O supplies use fast 20MHz GBW op amps as error amplifiers ...
Page 12
... Switching Architecture Each half of the LTC1705 is designed to operate as a synchronous buck converter (Figure 1). Each channel includes two high power MOSFET gate drivers to control external N-channel MOSFETs QT and QB. The core drivers ...
Page 13
... LTC1705 to completely enhance the gate of QT without requiring an additional, higher supply voltage. The two channels of the LTC1705 run from a common clock, with the phasing chosen to be 180 from the core side to the I/O side. This has the effect of doubling the ...
Page 14
... A current source pull-up is connected to the RUN/SS pin, allowing a soft-start ramp to be generated with a single external capacitor to ground. The 3 A current source is active even if the LTC1705 is shut down, ensur- ing the device will start when any external pull-down at RUN/SS is released. In shutdown, the LTC1705 enters ...
Page 15
... U U APPLICATIO S I FOR ATIO The RUN/SS pin shuts down the LTC1705 if it falls below 0.5V (Figure 4). Between 0.5V and about 1V, the LTC1705 wakes up and the duty cycle is kept to a miminum. As the potential at RUN/SS increases, the duty cycle increases linearly between 1V and 2V, reaching its final value of 90% when RUN/SS is above 2V ...
Page 16
... simple since the source attached to becomes a trade-off PGND; the LTC1705 just switches the BG pin between PGND and connected to SW which rises to PV on. To keep QT on, the LTC1705 must get TG one MOSFET V above PV GS(ON) driver with the negative lead of the driver attached to SW ...
Page 17
... LTC1705 applications, but they deserve a special caution here. Generic tantalum capacitors have a destruc- tive failure mechanism if they are subjected to large RMS currents (like those seen at the input of a LTC1705). At some random time after they are turned on, they can blow up for no apparent reason. The capacitor manufacturers are aware of this and sell special “ ...
Page 18
... So far, the AC response of the loop is pretty well out of the user’s control. The modulator is a fundamental piece of the LTC1705 design and the external L and C are usually chosen based on the regulation and load current require- ments without considering the AC loop response. The feedback amplifier, on the other hand, gives us a handle with which to adjust the AC response ...
Page 19
... Measurement will give more –360 accurate results, but simulation can often get close enough 1705 F07 to give a working system. To measure the modulator gain and phase directly, wire up a breadboard with an LTC1705 LTC1705 –6dB/OCT – ...
Page 20
... This breadboard should use appropriate construction techniques for high speed analog circuitry: bypass capacitors located close to the LTC1705, no long wires connecting components, appropriately sized ground returns, etc. Wire the feedback amplifier as a simple Type 1 loop, with a 10k resistor from and a 0 ...
Page 21
... LIMIT DS(ON) to 150% of the LIMIT is then programmed at the I pin using the MAX /10 A PROG should be checked in an IMAX specs are like horsepower DS(ON) changes when the switch node LIMIT is set too low, the LTC1705 may fail to start PROG DS(ON) (<10k) IMAX IMAX PROG 21 ...
Page 22
... C. The circuit design in the LTC1705 requires the use of an output capacitor as part of the frequency compensation. A minimum output capacitor of 2.2 F and ESR larger than 100m is recommended to prevent oscillations ...
Page 23
... Parasitic losses due to the large voltage swing at the source of QT cost efficiency, eliminating any advan- tage the 1-step conversion might have had. Note that power dissipation in the LTC1705 portion of a 2-step circuit is lower than it would typical 1-step converter, even in cases where the 1-step converter has higher total efficiency than the 2-step system ...
Page 24
... In our example 2-step system, the total output power is: Total Output Power = 15W + 16.5W + 0.375W + 3W + 19.5W = 54.375W (corresponding to 5V, 3.3V, 2.5V, 1.5V and 1.3V output voltages) Assuming the LTC1705 provides 90% efficiency at the core and I/O channels, and 75% efficiency at the LDO, the additional loads on the 5V and 3.3V supplies are: 1.3V: 19.5W/90% =21.67W 1.5V: 3W/90% =3.3W 2.5V: 0.375W/75% =0.5W ...
Page 25
... With a 5V supply, the errors contrib- uted by the LTC1705 itself add up to less than 1.5% DC error at the output. At the I/O side, the output voltage setting resistors (R1 and R in Figure 3) are the other major contributor to DC error ...
Page 26
... LTC1705 circuits. Solder the MOSFET and the resistor(s) as close to the output of the LTC1705 circuit as possible and set up the signal generator to pulse at a 100Hz rate with a 5% duty cycle. This pulses the LTC1705 with 500 s transients10ms ...
Page 27
... LTC DWG # 05-08-1641 0.229 – 0.244 (5.817 – 6.198 0.015 0.004 45 0.053 – 0.069 (0.38 0.10) (1.351 – 1.748) 0 – 8 TYP 0.008 – 0.012 (0.203 – 0.305) LTC1705 0.386 – 0.393* 0.033 (9.804 – 9.982) (0.838 1615 REF 0.150 – ...
Page 28
... STBYMD MBR0520LT1 QT1B PV PGOOD TGC TGIO 3 BOOSTC BOOSTIO SWC SWIO QB1B 4 BGC BGIO 27k 8 LTC1705 I I MAXC MAXIO 13 SENSEC COMPIO 11 FBC 330pF FBIO 10 COMPC 9 11k RUN/SS V INCLK 0 PGND 12 GND V OUTCLK VID0 VID1 VID2 VID3 VID4 ...