LTC1412 Linear Technology, LTC1412 Datasheet - Page 13

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LTC1412

Manufacturer Part Number
LTC1412
Description
12-Bit/ 3Msps/ Sampling A/D Converter
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
– 0.61mV (i.e., – 0.5LSB) at A
the A
0000 0000 and 1111 1111 1111. For full-scale adjust-
ment, an input voltage of 2.49817V (FS/2 – 1.5LSBs) is
applied to A
flickers between 0111 1111 1110 and 0111 1111 1111.
Board Layout and Bypassing
To obtain the best performance from the LTC1412, a
printed circuit board with ground plane is required. Layout
for the printed circuit board should ensure that digital and
analog signal lines are separated as much as possible. In
particular, care should be taken not to run any digital line
alongside an analog signal line.
An analog ground plane separate from the logic system
ground should be established under and around the ADC.
Pin 5 (AGND), Pins 22 and 14 (DGND) and Pin 19 (OGND)
and all other analog grounds should be connected to this
single analog ground point. The REFCOMP bypass capaci-
tor and the DV
nected to this analog ground plane, see Figure 12. All
analog circuitry grounds should be terminated to this
analog ground plane. The ground return from the ground
IN
50k
R1
Figure 11b. Offset and Full-Scale Adjust Circuit
input until the output code flickers between 0000
– 5V
IN
CIRCUITRY
R5
47k
+
ANALOG
DD
INPUT
and R2 is adjusted until the output code
50k
R2
bypass capacitor should also be con-
24k
U
R3
+
R6
24k
1
10 F
ANALOG INPUT
A
100
+
IN
INFORMATION
2
+
U
R4
A
IN
10 F
IN
REFCOMP
+
and adjust the offset at
4
1
2
3
4
5
0.1 F
W
A
A
V
REFCOMP
AGND
IN
IN
REF
AGND
+
Figure 12. Power Supply Grounding Practice
LTC1412
5
+
ANALOG GROUND PLANE
10 F
1412 F11b
U
V
SS
26
LTC1412
0.1 F
+
10 F
plane to the power supply should be low impedance.
Digital circuitry grounds must be connected to the digital
supply common. Low impedance analog and digital power
supply lines are essential to low noise operation of the
ADC. The traces connecting the pins and bypass capaci-
tors must be kept short and should be made as wide as
possible.
The LTC1412 has differential inputs to minimize noise
coupling. Common mode noise on the A
will be rejected by the input CMRR. The A
used as a ground sense for the A
will hold and convert the difference voltage between A
and A
be kept as short as possible. In applications where this is
not possible, the A
by side to equalize coupling.
Supply Bypassing
High quality, low series resistance ceramic, 10 F bypass
capacitors should be used at the V
Surface mount ceramic capacitors such as Murata
GRM235Y5V106Z016 provide excellent bypassing in a
small board space. Alternatively 10 F tantalum capacitors
in parallel with 0.1 F ceramic capacitors can be used.
Bypass capacitors must be located as close to the pins as
possible. The traces connecting the pins and the bypass
capacitors must be kept short and should be made as wide
as possible.
Example Layout
Figures 13a, 13b, 13c and 13d show the schematic and
layout of an evaluation board. The layout demonstrates the
proper use of decoupling capacitors and ground plane
with a two layer printed circuit board.
AV
DD
28
IN
0.1 F
OV
DD
. The leads to A
20
DV
DD
21, 27
DGND
IN
+
14, 22
and A
IN
OGND
+
(Pin 1) and A
19
IN
1412 F12
traces should be run side
IN
DD
+
POWER
SUPPLY
GROUND
and REFCOMP pins.
input; the LTC1412
SYSTEM
DIGITAL
IN
IN
+
IN
LTC1412
and A
(Pin 2) should
input can be
IN
13
leads
IN
+

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