LT1994 Linear Technology, LT1994 Datasheet - Page 14

• Manufacturer Part Number: LT1994
• Description: Low Noise - Low Distortion Fully Differential Input/Output Amplifier/Driver
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
LT1994
network is comprised of resistors whose values are less
than this, the LT1994’s output noise is voltage noise
dominant (See Figure 6):
Feedback networks consisting of resistors with values
greater than about 10kΩ will result in output noise which
is amplifi er current noise dominant.
Lower resistor values always result in lower noise at the
penalty of increased distortion due to increased loading of
the feedback network on the output. Higher resistor values
will result in higher output noise, but improved distortion
due to less loading on the output.
Figure 6 shows the noise voltage that will appear differ-
entially between the outputs. The common mode output
noise voltage does not add to this differential noise. For
optimum noise and distortion performance, use a dif-
ferential output confi guration.
Figure 6. LT1994 Output Spot Noise vs Spot Noise Contributed by
Feedback Network Alone
14
e
e
no
no
≈
≈ 2 • •
e
ni
100
10
• 1
1
0.1
⎛
⎜
⎝
I R
n
TOTAL (AMPLIFIER + FEEDBACK NETWORK)
OUTPUT NOISE
+
R
R
F
U
F
I
⎞
⎟
⎠
U
R
F
= R
FEEDBACK NETWORK
NOISE ALONE
1
I
(kΩ)
W
1994 F06
10
U
Power Dissipation Considerations
The LT1994 is housed in either an 8-lead MSOP package
(θ
W). The LT1994 combines high speed and large output
current with a small die and small package so there is
a need to be sure the die temperature does not exceed
150°C if housed in the 8-lead MSOP package, and 125°C
if housed in the 8-lead DD package. In the 8-lead MSOP,
LT1994 has its V
to lower the package thermal impedance by connecting the
V
and plated through holes can be used to spread the heat
generated by the device to the backside of the PC board.
For example, an 8-lead MSOP on a 3/32" FR-4 board with
540mm
to the V
(see Table 1).
The underside of the DD package has exposed metal
(4mm
This provides for the direct transfer of heat from the die
junction to the printed circuit board to help control the
maximum operating junction temperature. The dual-in-
line pin arrangement allows for extended metal beyond
the ends of the package on the topside (component side)
of a circuit board. Table 1 summarizes for both the MSOP
and DD packages, the thermal resistance from the die
junction to ambient that can be obtained using various
amounts of topside, and backside metal (2oz. copper).
On multilayer boards, further reductions can be obtained
using additional metal on inner PCB layers connected
through vias beneath the package.
In general, the die temperature can be estimated from
the ambient temperature T
sipation P
–
JA
T
pin to a large ground plane or metal trace. Metal trace
J
= 140°C/W or an 8-lead DD package (θ
= T
2
) from the lead frame where the die is attached.
–
2
A
pin can drop the θ
of 2oz. copper on both sides of the PC board tied
+
D
:
+ P
D
–
• θ
lead fused to the frame so it is possible
JA
JA
A
, and the device power dis-
from 140°C/W to 110°C/W
www.DataSheet4U.com
JA
= 160°C/
1994fa