LT1994 Linear Technology, LT1994 Datasheet - Page 12

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LT1994

Manufacturer Part Number
LT1994
Description
Low Noise - Low Distortion Fully Differential Input/Output Amplifier/Driver
Manufacturer
Linear Technology
Datasheet

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ALTERA
0
APPLICATIO S I FOR ATIO
LT1994
by the equation:
In general, the degree of feedback pair mismatch is a source
of common mode to differential conversion of both signals
and noise. Using 1% resistors or better will provide about
28dB of common mode rejection. Using 0.1% resistors
will provide about 48dB of common mode rejection. A low
impedance ground plane should be used as a reference
for both the input signal source and the V
short of V
with a high quality 0.1µF ceramic capacitor to this ground
plane will further mitigate against common mode signals
from being converted to differential.
Input Impedance and Loading Effects
The input impedance looking into the V
of Figure 1 depends on whether or not the sources V
and V
(V
is simply:
For single ended inputs, because of the signal imbalance
at the input, the input impedance actually increases over
the balanced differential case. The input impedance looking
into either input is:
Input signal sources with non-zero output impedances can
also cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the source’s output impedance be compensated for.
If input impedance matching is required by the source,
12
INP
V
(
R
R
V
OUTDIFF
INP
INP
ICM
INM
= –V
= R
=
OCM
are fully differential. For balanced input sources
R
INM
V
INM
INM
OCM
=
), the input impedance seen at either input
to this ground plane or bypassing the V
V
= R
OUT
=
)
β
I
U
+
1
AVG
– •
β
2
V
1
OUT
V
U
R
INDIFF
R R
I
I
R
+
F
F
=
W
0
INP
OCM
or V
pin. A direct
U
INM
input
OCM
INP
R
According to Figure 3, the input impedance looking into
the differential amp (R
case, thus:
R
Input Common Mode Voltage Range
The LT1994’s input common mode voltage (V
as the average of the two input voltages, V
It extends from V
input common mode range depends on the circuit con-
fi guration (gain), V
fully differential input applications, where V
the common mode input is approximately:
Figure 3. Optimal Compensation for Signal Source Impedance
1
2
R
R
R
V
V
should be chosen (see Figure 3):
is chosen to balance R
ICM
INM
CM
1
2
=
=
R
R
1
2
R
=
R
=
R
CHOSEN SO THAT R
CHOSEN TO BALANCE R
R R
INM
INM
1
R
1
V
+
IN
F
1
R
V
R
– •
+
+
S
F
S
S
R
2
R
R
1
+
2
S
I
S
V
R
to approximately 1.25V below V
R
IN
2
R
OCM
S
R R
1
= R
I
|| R
I
INM
S
R
1
+
INM
|| R
|| R
F
R
and V
1
1
) refl ects the single ended source
S
= R
V
F
1
OCM
S
|| R
R
INM
CM
S
R
R
I
I
:
www.DataSheet4U.com
(refer to Figure 4). For
R
I
R
+
+
I
R
LT1994
F
R
R
⎟ +
F
F
+
ICM
IN
INP
+
, and V
) is defi ned
1994 F03
= –V
+
. The
INM
1994fa
IN
.
,

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