AD538 Analog Devices, AD538 Datasheet - Page 8

• Manufacturer Part Number: AD538
• Description: Real-Time Analog Computational Unit ACU
• Manufacturer: Analog Devices

AD538
TWO-QUADRANT DIVISION
The two-quadrant linear divider circuit illustrated in Figure 13
uses the same basic connections as the one-quadrant version.
However, in this circuit the numerator has been offset in the
positive direction by adding the denominator input voltage to it.
The offsetting scheme changes the divider’s transfer function
from:
to:
where A
As long as the magnitude of the denominator input is equal to
or greater than the magnitude of the numerator input, the cir-
cuit will accept bipolar numerator voltages. However, under the
conditions of a 0 V numerator input, the output would incor-
rectly equal +14 V. The offset can be removed by connecting
the +10 V reference through resistors R1 and R2 to the output
section’s summing node I at Pin 9 thus providing a gain of 1.4
at the center of the trimming potentiometer. The pot R2 adjusts
out or corrects this offset, leaving the desired transfer function
of 10 V (V
OUTPUT
Z OFFSET TRIM
V
AD589
OPTIONAL
OS
Figure 13. Two-Quadrant Division with 10 V Scaling
1M
ADJ
–V
V
S
ADJUST
68k
5%
3.9M
–1.2V
10k
O
ZERO
Z
R2
10 A 10 V
10M
/ V
NUMERATOR
35 k
25 k
X
10V
+15V
–15V
12.4k
).
R1
V
Z
+10V
35k
+2V
V
V
I
B
O
Z
Z
I
V
1
2
3
4
5
6
7
8
9
Z
V
25k
V
V
25k
O
V
OUTPUT
X
Z
X
AV
100
REFERENCE
10V
V
INTERNAL
VOLTAGE
OUT
X
= 10
ANTILOG
V
V
RATIO
LOG
( )
Z
X
10 V 1 A
V
V
Z
X
LOG
AD538
FOR
V
X
100
V
Z
25k
25k
V
V
DENOMINATOR
X
Z
18
17
16
15
14
13
12
10
11
A
D
I
V
SIGNAL
GND
PWR
GND
C
I
V
X
Y
V
X
Y
IN4148
X
35k
–8–
LOG RATIO OPERATION
Figure 14 shows the AD538 configured for computing the log of
the ratio of two input voltages (or currents). The output signal
from B is connected to the summing junction of the output ampli-
fier via two series resistors. The 90.9
tively degrades the temperature coefficient of the 3500 ppm/ C
resistor to produce a 1.09 k +3300 ppm/ C equivalent value.
In this configuration, the V
less than zero (–1.2 V in this case) removing this input from the
transfer function.
The 5 k potentiometer controls the circuit’s scale factor ad-
justment providing a +1 V per decade adjustment. The output
offset potentiometer should be set to provide a zero output with
V
output of 3 V with V
The log ratio circuit shown achieves 0.5% accuracy in the log
domain for input voltages within three decades of input range:
10 mV to 10 V. This error is not defined as a percent of full-
scale output, but as a percent of input. For example, using a
1 V/decade scale factor, a 1% error in the positive direction at
the INPUT of the log ratio amplifier translates into a 4.3 mV
deviation from the ideal OUTPUT (i.e., 1 V
4.3214 mV). An input error 1% in the negative direction is
slightly different, giving an output deviation of 4.3648 mV.
ADJUSTMENT
X
= V
OPTIONAL
INPUT V
FACTOR
90.9
1%
1k
+3500
ppm/ C
ADJUST
SCALE
AD589
10M
OUTPUT
5k
Z
1M
= 1 V. The input V
OS
–V
2k
+V
–V
1%
S
–1.2V
S
S
68k
5%
10M
10k
+10V
+15V
–15V
Figure 14. Log Ratio Circuit
+2V
V
V
I
B
O
Z
Z
I
OPTIONAL
OUTPUT V
ADJUSTMENT
Z
1
2
3
4
5
6
7
8
9
= l mV and V
25k
25k
OUTPUT
Y
OS
100
REFERENCE
Z
INTERNAL
VOLTAGE
input must be tied to some voltage
V
adjustment should be set for an
O
= 1V LOG
ANTILOG
RATIO
LOG
X
= 1 V.
10
metal film resistor effec-
LOG
AD538
( )
100
V
V
Z
X
25k
log
25k
10
18
17
16
15
14
13
12
10
11
(1.01) =
A
D
I
V
SIGNAL
GND
PWR
GND
C
I
V
X
Y
X
Y
REV. C
48.7
IN4148
V
INPUT
X