74HC574D,653 NXP Semiconductors, 74HC574D,653 Datasheet - Page 4

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74HC574D,653

Manufacturer Part Number
74HC574D,653
Description
IC FLIP FLOP OCTAL D 3ST 20SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Type
D-Type Busr
Datasheet

Specifications of 74HC574D,653

Output Type
Tri-State Non Inverted
Package / Case
20-SOIC (7.5mm Width)
Function
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
133MHz
Delay Time - Propagation
14ns
Trigger Type
Positive Edge
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
HC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
14 ns at 5 V
High Level Output Current
- 7.8 mA
Low Level Output Current
7.8 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1479-2
74HC574D-T
933715520653
NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74HC_HCT574
Product data sheet
Symbol
OE
D[0:7]
GND
CP
Q[0:7]
V
Operating mode
Load and read register
Load register and disable output
Symbol
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
CC
tot
H = HIGH voltage level;
h = HIGH voltage level one setup time prior to the HIGH-to-LOW CP transition;
L = LOW voltage level;
l = LOW voltage level one setup time prior to the HIGH-to-LOW CP transition;
Z = high-impedance OFF-state;
 = LOW-to-HIGH clock transition.
For DIP20 package: P
For SO20: P
For SSOP20 and TSSOP20 packages: P
Pin description
Function table
Limiting values
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
11
19, 18, 17, 16, 15, 14, 13, 12 3-state flip-flop output
20
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
tot
derates linearly with 8 mW/K above 70 C.
5.2 Pin description
tot
derates linearly with 12 mW/K above 70 C.
[1]
tot
All information provided in this document is subject to legal disclaimers.
Conditions
V
V
V
derates linearly with 5.5 mW/K above 60 C.
Description
3-state output enable input (active LOW)
data input
ground (0 V)
clock input (LOW-to-HIGH, edge triggered)
supply voltage
I
O
O
Input
OE
L
L
H
H
DIP20 package
SO20, SSOP20 and TSSOP20 packages
< 0.5 V or V
< 0.5 V or V
= 0.5 V to (V
Rev. 3 — 15 December 2010
I
O
CP
> V
CC
> V
CC
+ 0.5 V)
Octal D-type flip-flop; positive edge-trigger; 3-state
CC
+ 0.5 V
+ 0.5 V
Dn
l
h
l
h
74HC574; 74HCT574
Internal
flip-flop
L
H
L
H
[1]
[2]
Min
0.5
-
-
-
-
-
65
-
-
© NXP B.V. 2010. All rights reserved.
Max
+7
20
20
35
+70
70
+150
750
500
Output
Qn
L
H
Z
Z
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
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