TS68EN360MAB Atmel Corporation, TS68EN360MAB Datasheet - Page 65

• Manufacturer Part Number: TS68EN360MAB
• Description: 32-bit Communication Controller, 25 or 33 MHz
• Manufacturer: Atmel Corporation

Figure 7-55. Ethernet Receive Timing
Figure 7-56. Ethernet Transmit Timing
Notes:
2113B–HIREL–06/05
1. Transmit clock invert (TCI) bit in GSMR is set.
2. If RENA is deasserted before TENA, or RENA is not asserted at all during transit, then CSL bit is set in the buffer descriptor
TENA (RTS1)
RENA (CD1)
RENA (CD1)
(OUTPUT)
(OUTPUT)
at the end of frame transmission.
(NOTE 1)
(NOTE 2)
(INPUT)
(INPUT)
(INPUT)
TCLK1
RCLK1
TXD1
RXD1
128
133
131
121
124
128
129
125
130
132
121
122
123
126
LAST BIT
134
127
TS68EN360
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