74VHC273MTCX Fairchild Semiconductor, 74VHC273MTCX Datasheet

IC FLIP FLOP OCT DTYPE 20TSSOP

74VHC273MTCX

Manufacturer Part Number
74VHC273MTCX
Description
IC FLIP FLOP OCT DTYPE 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74VHCr
Type
D-Type Busr
Datasheet

Specifications of 74VHC273MTCX

Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
165MHz
Delay Time - Propagation
5.8ns
Trigger Type
Positive Edge
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Logic Family
VHC
Technology
CMOS
Number Of Bits
8
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
TSSOP
Propagation Delay Time
19.5ns
Low Level Output Current
8mA
High Level Output Current
-8mA
Frequency (max)
70MHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Number Of Circuits
8
Logic Type
D-Type Flip-Flop
Input Type
Single-Ended
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74VHC273MTCXTR

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©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
74VHC273
Octal D-Type Flip-Flop
Features
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
74VHC273M
74VHC273SJ
74VHC273BQ
(Preliminary)
74VHC273MTC
Order Number
High Speed: f
Low power dissipation: I
High noise immunity: V
Power down protection is provided on all inputs
Low noise: V
Pin and function compatible with 74HC273
Leadless DQFN Package
OLP
MAX
= 0.9V (max)
= 165MHz (typ) at V
(Preliminary)
Package
MLP020B
Number
MTC20
M20B
M20D
NIH
CC
= V
= 4µA (max) at T
NIL
= 28% V
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
CC
= 5V
CC
A
(min)
= 25°C
General Description
The VHC273 is an advanced high speed CMOS Octal
D-type flip-flop fabricated with silicon gate CMOS tech-
nology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
The register has a common buffered Clock (CP) which is
fully edge-triggered. The state of each D input, one setup
time before the LOW-to-HIGH clock transition, is trans-
ferred to the corresponding flip-flop's Q output. The
Master Reset (MR) input will clear all flip-flops simulta-
neously. All outputs will be forced LOW independently of
Clock or Data inputs by a LOW voltage level on the MR
input.
An input protection circuit insures that 0V to 7V can be
applied to the inputs pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Package Description
www.fairchildsemi.com
April 2007
tm

Related parts for 74VHC273MTCX

74VHC273MTCX Summary of contents

Page 1

... MTC20 Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 General Description = 5V The VHC273 is an advanced high speed CMOS Octal CC = 25° ...

Page 2

... Data Inputs Master Reset CP Clock Pulse Input Q –Q Data Outputs 0 7 ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Logic Symbols Function Table Operating Mode Reset (Clear) Load ‘1’ Load ‘0’ HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition ...

Page 3

... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Figure 1. 3 www.fairchildsemi.com ...

Page 4

... Operating Temperature OPR Input Rise and Fall Time 3.3V ± 0. 5.0V ± 0. Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Parameter (1) Parameter 4 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ± ...

Page 5

... OL (2) V Quiet Output Minimum OLV Dynamic V OL (2) V Minimum HIGH Level IHD Dynamic Input Voltage (2) V Maximum LOW Level ILD Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 (V) Conditions Min. 1.50 0 –50µ 1 2.9 IL 4.4 = – ...

Page 6

... Minimum Pulse Width (CK (L) Minimum Pulse Width (MR Minimum Setup Time S t Minimum Hold Time H t Minimum Removal Time (MR) REC Note 3.3 ± 0.3V or 5.0 ± 0.5V CC ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 V (V) Conditions CC = 15pF 3.3 ± 0 50pF 15pF 5.0 ± 0 50pF 15pF 3.3 ± ...

Page 7

... Tape and Reel Specification Tape Format for DQFN Package Designator Section BQ Leader (Start End) Trailer (Hub End) Tape Dimensions Dimensions are in millimeters unless otherwise noted. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Tape Number Cavities 125 (typ.) Carrier 2500/3000 75 (typ.) Figure 2. ...

Page 8

... Tape and Reel Specification Reel Dimensions for DQFN Dimensions are in inches (millimeters) unless otherwise noted. Tape Size A 12mm 13.0 (330) ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 (Continued 0.059 0.512 0.795 (1.50) (13.00) (20.20) Figure 7.008 0.488 0.724 (178) (12.4) (18.4) ...

Page 9

... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 4. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number M20B 9 www.fairchildsemi.com ...

Page 10

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 5. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number M20D 10 www.fairchildsemi.com ...

Page 11

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 6. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number MLP020B (Preliminary) 11 www.fairchildsemi.com ...

Page 12

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number MTC20 12 www.fairchildsemi.com ...

Page 13

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...

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