AD9520 Analog Devices, Inc., AD9520 Datasheet - Page 74

• Manufacturer Part Number: AD9520
• Description: 12 Lvpecl/24 Cmos Output Clock Generator
• Manufacturer: Analog Devices, Inc.

AD9520-5
Table 54. EEPROM Buffer Segment
Reg.
Addr
(Hex) Bit(s) Name
A00 to
A16
Table 55. EEPROM Control
Reg.
Addr
(Hex) Bit(s) Name
B00
B01
B02
B02
B03
[0]
[0]
[1]
[0]
[0]
[7:0] EEPROM Buffer
STATUS_EEPROM
(read-only)
EEPROM
data error
(read-only)
Soft_EEPROM
Enable EEPROM
write
REG2EEPROM
Segment Register 1
to EEPROM Buffer
Segment Register 23
This read-only register indicates the status of the data transferred between the EEPROM and the buffer
register bank during the writing and reading of the EEPROM. This signal is also available at the STATUS pin
when 0x01D[7] is set.
[0] = 0; data transfer is done.
[0] = 1; data transfer is not done.
This read-only register indicates an error during the data transferred between the EEPROM and the buffer.
[0] = 0; no error. Data is correct.
[0] = 1; incorrect data detected.
When the EEPROM pin is tied low, setting Soft_EEPROM resets the AD9520 using the settings saved in
EEPROM.
[1] = 1; soft reset with EEPROM settings (self-clearing).
Enables the user to write to the EEPROM.
[0] = 0; EEPROM write protection is enabled. User cannot write to EEPROM (default).
[0] = 1; EEPROM write protection is disabled. User can write to EEPROM.
Transfers data from the buffer register to the EEPROM (self-clearing).
[0] = 1; setting this bit initiates the data transfer from the buffer register to the EEPROM (writing process);
it is reset by the I²C master after the data transfer is done.
Description
Description
The EEPROM buffer segment section stores the starting address and number of bytes that are to be
stored and read back to and from the EEPROM. Because the AD9520 register space is noncontiguous,
the EEPROM controller needs to know the starting address and number of bytes in the AD9520 register
space to store and retrieve from the EEPROM. In addition, there are special instructions for the EEPROM
controller, operational codes (that is, IO_UPDATE and end-of-data) that are also stored in the EEPROM
buffer segment. The on-chip default setting of the EEPROM buffer segment registers is designed such
that all registers are transferred to/from the EEPROM, and an IO_UPDATE is issued after transfer. See the
Programming the EEPROM Buffer Segment section for more information.
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