AD9049 Analog Devices, Inc., AD9049 Datasheet
AD9049
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AD9049 Summary of contents
Page 1
... MSPS sample rates with 9-bit resolution. The encode clock is TTL compatible and the digital outputs are CMOS; both can operate with 5 V/3 V logic, selected by the user. The two-step architecture used in the AD9049 is opti- mized to provide the best dynamic performance available while maintaining low power consumption. ...
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... 8. –2– AD9049BR/BRS Typ Max Units 9 Bits 0.5 1.0 LSB 0.5 LSB 0.5 1.0 LSB 0.5 LSB GUARANTEED 1.0 7 100 ppm/ C 1.024 V p-p +7 +25 mV +51 mV 5.0 6 ...
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... Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0 REF Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Operating Temperature AD9049BR/BRS . . . . . . . . . . . . . . . . . . . . . – +85 C Storage Temperature . . . . . . . . . . . . . . . . . . . – +150 C *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... AD9049 Table I. AD9049 Digital Coding (Single Ended Input AIN, AINB Bypassed to GND) Analog Input 3.810 3.300 2.790 Pin No Name 1, 7, 12, 21, 23 GND VREF OUT 4 VREF IN 5 COMP 6 REF BP 9 AINB 10 AIN 13 ENCODE (MSB) 16–19 D7–D4 20, 22 ...
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... D0–D8 16k Output Stage V D VREF OUT VREF (Pin 3) IN (Pin 4) Output Reference Circuit Figure 3. Equivalent Circuits –5– AD9049 MIN TYP MAX APERTURE DELAY 2.7ns PULSE WIDTH HIGH 10ns 166ns PULSE WIDTH LOW 10ns 166ns OUTPUT PROP DELAY 5.0ns 8.2ns 15 ...
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... AD9049–Typical Performance Curves 361 342 A = 10.3 MHz IN 323 304 OUTPUTS @ 5V 285 266 247 OUTPUTS @ 3V 228 209 190 171 0 10 CLOCK RATE – MSPS Figure 4. Power Dissipation vs. Clock Rate 80 ENCODE = 30 MSPS 74 HARMONIC DISTORTION 68 62 SIGNAL-TO-NOISE ANALOG INPUT FREQUENCY – MHz Figure 5 ...
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... Figure 14. ADC Gain vs. A 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 – 12.5 15 Figure 15. t –7– AD9049 ENCODE = 30 MSPS A = 2.3 MHz DUTY CYCLE – % Figure 13. SNR vs. Clock Pulse Width ENCODE = 30 MSPS 1 10 100 ANALOG INPUT FREQUENCY – MHz Frequency IN [ DATA RISING EDGE ...
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... By varying the voltage on the levels vary respectively. By connecting Pins 20 and 22 to the 3 V logic supply, the AD9049 will supply 3 V output levels. Care should be taken to filter and isolate the output supply of the AD9049 as noise could be coupled into the ADC, limiting performance. ...
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... AD9049 (Pin 3, V Output). In normal operation the internal REF reference is used by strapping Pins 3 and 4 of the AD9049 to- gether. The internal reference has 500 A of extra drive current that can be used for other circuits. Some applications may require greater accuracy, improved tem- perature performance or adjustment of the gain of the AD9049, which cannot be obtained by using the internal reference ...
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... AD9049 Figure 20. Evaluation Board Top Layer Figure 21. Evaluation Board Ground Layer Figure 22. Evaluation Board Bottom Layer –10– REV. A ...
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... TP2 C3 0.1 F +5V E1 +5V 2 U6:A 74AC00R U6:C 74AC00R +5V +5V C10 C12 C13 0.1 F 0.1 F 0.1 F –5.2V –5.2V C20 0.1 F Figure 23. Evaluation Board Schematic –11– AD9049 U3 74AC574R ...
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... AD9049 0.0118 (0.30) 0.0040 (0.10) 0.078 (1.98) 0.068 (1.73) 0.008 (0.203) 0.002 (0.050) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead SOIC (R-28) 0.7125 (18.10) 0.6969 (17.70 PIN 1 0.1043 (2.65) 0.0926 (2.35) 0.0500 0.0192 (0.49) SEATING 0.0125 (0.32) (1.27) 0.0138 (0.35) PLANE BSC 0.0091 (0.23) 28-Lead SSOP (RS-28) 0.407 (10.34) 0.397 (10.08 0.07 (1.79) PIN 1 0.066 (1.67) 8 0.0256 ...