ST62E25C ST Microelectronics, ST62E25C Datasheet - Page 22

• Manufacturer Part Number: ST62E25C
• Description: (ST62T15C / ST62T25C) 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER
• Manufacturer: ST Microelectronics

ST6215C/ST6225C
CLOCK SYSTEM (Cont’d)
5.1.3 Low Frequency Auxiliary Oscillator
The Low Frequency Auxiliary Oscillator has three
main purposes. Firstly, it can be used to reduce
power consumption in non timing critical routines.
Secondly, it offers a fully integrated system clock,
without any external components. Lastly, it acts as
a backup oscillator in case of main oscillator fail-
ure.
This oscillator is available when the OSG ENA-
BLED option is selected in the option byte (refer to
the Option Bytes section of this document). In this
case, it automatically starts one of its periods after
the first missing edge of the main oscillator, what-
ever the reason for the failure (main oscillator de-
fective, no clock circuitry provided, main oscillator
switched off...). See
User code, normal interrupts, WAIT and STOP in-
structions, are processed as normal, at the re-
duced f
cy is decreased, since the internal frequency is be-
low 1.2 MHz.
At power on, until the main oscillator starts, the re-
set delay counter is driven by the LFAO. If the
main oscillator starts before the 2048 or 32768 cy-
cle delay has elapsed, it takes over.
22/105
1
(LFAO)
LFAO
frequency. The A/D converter accura-
Figure
11.
The Low Frequency Auxiliary Oscillator is auto-
matically switched off as soon as the main oscilla-
tor starts.
5.1.4 Register Description
ADC CONTROL REGISTER (ADCR)
Address: 0D1h — Read/Write
Reset value: 0100 0000 (40h)
Bit 7:3, 1:0 = ADCR[7:3], ADCR[1:0] ADC Control
Register .
These bits are used to control the A/D converter (if
available on the device) otherwise they are not
used.
Bit 2 = OSCOFF Main Oscillator Off.
0: Main oscillator enabled
1: Main oscillator disabled
Note: The OSG must be enabled using the OS-
GEN option in the Option Byte, otherwise the OS-
COFF setting has no effect.
ADCR
7
7
ADCR
6
ADCR
5
ADCR
4
ADCR
3
OSC
OFF
ADCR
1
ADCR
0
0