CY7C4271-10JC Cypress Semiconductor Corp, CY7C4271-10JC Datasheet
CY7C4271-10JC
Specifications of CY7C4271-10JC
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CY7C4271-10JC Summary of contents
Page 1
... Center power and ground pins for reduced noise • Supports free-running 50% duty cycle clock inputs • Width-Expansion Capability • Military temp SMD Offering – CY7C4271-15LMB • 32-pin PLCC/LCC and 32-pin TQFP • Pin-compatible density upgrade to CY7C42X1 family • Pin-compatible density upgrade to ...
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... Resets device to empty condition. A reset is required before an initial read or write operation after power-up. I When OE is LOW, the FIFO’s data outputs drive the bus to which they are connected HIGH, the FIFO’s outputs are in High Z (high-impedance) state. 7C4261/71-10 7C4261/71-15 100 66 0 CY7C4261 CY7C4271 Description 7C4261/71-25 7C4261/71- Page Unit MHz ns ...
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... Whether the flag offset registers are programmed as described in Table 1 or the default values are used, the programmable almost-empty flag (PAE) (PAF) states are deter- mined by their corresponding offset registers and the difference between the read and write pointers. CY7C4261 CY7C4271 16K × 9 32K × Empty Offset (LSB) Reg ...
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... PAF. PAE is synchronized to the LOW-to-HIGH transition of WCLK by one flip-flop and is set LOW when the number of unread words in the FIFO is greater than or equal to CY7C4261 (16K-m) and CY7C4271 (32K-m). PAF is set HIGH by the LOW-to-HIGH transition of WCLK when the number of available memory locations is greater than m ...
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... Figure 2. Block Diagram of 16K × 18/32K × 18 Deep Sync FIFO Memory Used in a Width-Expansion Configuration Document #: 38-06015 Rev. *B RESET (RS) 9 CY7C4261/ Read Enable 2 (REN2) CY7C4261 CY7C4271 READ CLOCK (RCLK) READ ENABLE 1 (REN1) OUTPUT ENABLE (OE) PROGRAMMABLE(PAE) EMPTY FLAG (EF) #1 EMPTY FLAG (EF DATA OUT (Q) 9 ...
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... V < Com’l 35 Ind/Mil 40 Com’l 10 Ind/Mil 15 Description Test Conditions MHz 5.0V CC [10, 11] 3.0V GND R2 680 1.91V . OHZ CY7C4261 CY7C4271 Ambient Temperature + +125 C Min. Max. Min. Max. Min. 2.4 2.4 2.4 0.4 0.4 2.0 V 2 2.2 V 2 0.5 ...
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... Notes: 12. Pulse widths less than minimum values are not allowed. 13. Values guaranteed by design, not currently tested. Document #: 38-06015 Rev. *B 7C4261/71 10 7C4261/71 15 7C4261/71 25 7C4261/71 35 Min. Max. Min. 100 4 [13 [13 CY7C4261 CY7C4271 Max. Min. Max. Min. Max. 66.7 40 28.6 MHz ...
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... CLKL t ENH NO OPERATION t REF [15] t SKEW1 , then FF may not change state until the next WCLK rising edge. SKEW1 , then EF may not change state until the next RCLK rising edge. SKEW2 CY7C4261 CY7C4271 ENH NO OPERATION NO OPERATION t WFF t REF VALID DATA t OHZ Page ...
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... The first word is available the cycle after EF goes HIGH, always. Document #: 38-06015 Rev RSS t RSS t RSS t RSF t RSF t RSF D 1 [19] t FRL t SKEW1 t REF t OLZ t OE (maximum When t < minimum specification, t CLK SKEW2 SKEW2 CY7C4261 CY7C4271 t RSR t RSR t RSR [17 OE [20 (maximum) = either 2 FRL CLK SKEW1 Page CLK ...
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... OE Q –Q DATA IN OUTPUT REGISTER 0 8 Document #: 38-06015 Rev. *B [19 REF REF DATA WRITE t WFF t ENH t A DATA READ CY7C4261 CY7C4271 t DS DATA WRITE 2 t ENH t ENS t t ENH ENS [19] t FRL t t SKEW1 DATA READ NO WRITE [14] t SKEW1 t t WFF ...
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... ENH Note 22 [21] t PAE Note t CLKL ENS ENH Note PAF ENS ENH (M+1)WORDS IN FIFO (m 1) words of the FIFO when PAF goes LOW. m words for CY7C4271. CY7C4261 CY7C4271 WORDS Note IN FIFO ENS ENS ENH FULL MWORDS [26] IN FIFO [27 PAF SKEW2 ENS ENS ...
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... WEN2/LD t ENS REN1, REN2 Q – Document #: 38-06015 Rev CLKL t ENH PAE OFFSET PAE OFFSET LSB MSB t CLKL t ENH t A UNKNOWN PAE OFFSET LSB CY7C4261 CY7C4271 PAF OFFSET PAF OFFSET LSB MSB PAF OFFSET MSB PAF OFFSET PAE OFFSET MSB LSB Page ...
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... Thin Quad Flatpack J65 32-Lead Plastic Leaded Chip Carrier A32 32-Lead Thin Quad Flatpack J65 32-Lead Plastic Leaded Chip Carrier A32 32-Lead Thin Quad Flatpack J65 32-Lead Plastic Leaded Chip Carrier CY7C4261 CY7C4271 NORMALIZED t vs. AMBIENT A TEMPERATURE V =5.0V CC 55.00 5.00 65.00 125.00 ...
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... Ordering Information (continued) 16Kx9 Deep Sync FIFO Speed (ns) Ordering Code 35 CY7C4261-35AC CY7C4261-35JC CY7C4261-35AI CY7C4261-35JI 32Kx9 Deep Sync FIFO Speed (ns) Ordering Code 10 CY7C4271-10AC CY7C4271-10JC CY7C4271-10AI CY7C4271-10JI 15 CY7C4271-15AC CY7C4271-15JC CY7C4271-15AI CY7C4271-15JI CY7C4271-15LMB 5962-9736101QYA 25 CY7C4271-25AC CY7C4271-25JC CY7C4271-25AI CY7C4271-25JI 35 CY7C4271-35AC CY7C4271-35JC CY7C4271-35AI CY7C4271-35JI MILITARY SPECIFICATIONS ...
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... REF t 9, 10, 11 RFF t 9, 10, 11 WEF t 9, 10, 11 WFF t 9, 10, 11 WHF t 9, 10, 11 RHF t 9, 10, 11 RAE t 9, 10, 11 RPE t 9, 10, 11 WAF t 9, 10, 11 WPF t 9, 10, 11 XOL t 9, 10, 11 XOH Document #: 38-06015 Rev. *B Subgroups CY7C4261 CY7C4271 Page ...
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... Package Diagrams 32-Lead Thin Plastic Quad Flatpack 7 × 7 × 1.0 mm A32 Document #: 38-06015 Rev. *B 32-Lead Plastic Leaded Chip Carrier J65 CY7C4261 CY7C4271 51-85063-*B 51-85002-*B Page ...
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... Package Diagrams (continued) All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-06015 Rev. *B 32-Pin Rectangular Leadless Chip Carrier L55 MIL-STD-1835 C-12 CY7C4261 CY7C4271 51-80068-** Page ...
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... Document History Page Document Title: CY7C4261, CY7C4271 16K/32K X 9 Deep Synchronous FIFOs Document Number: 38-06015 REV. ECN NO. Issue Date ** 106476 09/10/01 *A 122267 12/26/02 *B 127853 08/22/03 Document #: 38-06015 Rev. *B Orig. of Change SZV Changed from Spec number: 38-00658 to 38-06015 RBI Added power-up requirements Maximum Ratings Information ...